Other Parts Discussed in Thread: AFE7900
I have a custom board design with AFE7900 and Xilinx Xcku050 FPGA.
I want to test my JESD lanes with registers B7h (DAC JESD - TX_JESD_TEST_S IG_GEN_MODE ) and 108h, 109h (ADC JESD - RX1_JESD_TEST_SIG_GEN_MODE…
Other Parts Discussed in Thread: AFE7900EVM , AFE7900 At present, I just bought AFE7900EVM and ZCU102EVB. I hope TI Support Team can send a complete vivado reference design project of FPGA on AFE7900+ZC102 platform.
Because this is the first time for me…
Hi Suleyman,
To enable the Rx PRBS for the 5th and 6th SERDES lane you should write 0x40 to address 0x16.
An example of writing to register 0x4084 is shown below:
device.writeReg(0x4285,0x00)
device.writeReg(0x4284,0x06)
To read registers in the SERDES…
Part Number: AFE7900
Figure1.
I have a custom board design with AFE7900 and Xilinx Xcku050 FPGA.
Figure 1 shows that the FPGA-AFE connection in my design.
All Xilinx JESD204 IP are configured as LMFS=1-4-8-1-0, K=4, and LaneRate=10 Gbps. core_clk frequency…
Part Number: AFE7900EVM Other Parts Discussed in Thread: AFE7900 Hello,
I have been working with an AFE7900EVM board and a zynq FPGA. I have managed to get the combination working using the latte tool to configure the AFE7900EVM module, however I need…
Hi Maitry,
The graphs that are included in the datasheet are demonstrating the performance of the ADC when the input power is set to directly the level needed to reach the -60dBFS to -3dBFS level. Using your example of -60 dBFS ( -60 dBm ) to -3 DBFS…
Part Number: AFE7900
Hello everybody. I need some information on the AFE7900 chip. Reading the datasheet I understand that the ADC sample format is " 16 bit floating point". It's correct? Is there an option to generate data in "integer" or "fixed…
Part Number: AFE7900 Other Parts Discussed in Thread: AFE7906 Hello support team,
Where I can find the break up of current consumption details based on the configuration usage of AFE7900? For example, If I am using only RX Channels (not TX and FB channels…
Part Number: AFE7900 Hi team,
My client is doing an oscilloscope. The customer asked whether AFE7900 can be used as an oscilloscope ADC.
If so, what needs to be paid attention to? thx
Part Number: AFE7900 Dear team,
our customer has a inquiry below
I want to communicate with AFE7900 in Xilinx FPGA. I need to design SERDERS Rate is 10 Gbps, and the output rates are 125 MSPS. I got some information about JESD204B configuration in device…