Part Number: AM5749 Hi Dears,
I am using the TMS320C66x DSP CorePac of this SoC.
As data exchanges are required with the Dual Cortex-A15, we retained the IPC stack solution.
Seems that stack is only available on TI-RTOS (no baremetal version is available…
Adding to Keerthy's response...
0xC is the vector for CPU abort. It has nothing to do with PRUSS1_CFG_PRUSS_GPCFG1.
You may have loaded some binary with those symbols at the address.
What most likely happened was something wrong in your code, for example…
Part Number: AM5749
Hi Dears.
I have a problem to setting the GPMC using dts file descriptions.
I'm using SDK-linux-am57xx-evm-08_02_01_00 and SD-card booting.
I modify dra7.dtsi and am574x-idk.dts files as like below.
===== dra7.dtsi =====
/* OCP2SCP1…
Part Number: AM5749 Hello, I'm trying to port a c66 DSP firmware initially developed as baremetal application (without TI-RTOS) and not compatible with a running Linux OS on the ARM core. This firmware is based on a TI demo where all the board support…
jian35385 said: Also once of my colleagues asked if you are using common refclk architecture, as we have seen similar link issues solved by common refclk.
The refclk is provided by an PI6C557-05LE device. CLK0 of PI6C557-05LE is connected to LJCB_CLK of…
Part Number: AM5749 Hi TI Team:
We refer to the AM574x IDK datasheet and are going to use ECC on DDR3
Can TI team help us to confirm whether this AM5749 hardware circuit can working with it?
Best regards
ti_obc_ddr3_ecc.pdf
Part Number: AM5749 Hello,
I interfaced an FPGA to the SoC via GPMC.
The retained configuration is:
Asynchronous
16 bits
and CYCLE2CYCLE = 0
Despite this, I observe a very long pause between two consecutive readings.
The registers content is as below…
Hi Suman,
Using no-idle mode fixed the gptimer instability. I hope this thread could help someone else with the default mode force-idle. I'm closing this thread.
Best regards, Romain
Part Number: AM5749
Hi,
I am currently working on disabling the unused cores on AM5749. We have a baremetal application using Processor SDK RTOS. (We didn't use the RTOS component). My application runs on Cortex A15 _0 and it is the only core that needs…
Hi , Thanks for your answer, I've check my pinmux but I don't see anything in the sysconfig files (attached). all seem good to me. Clocks are OK, all GPMC pins are in default mode which is what I want (?), is there something that I didn't saw?…