Part Number: AM62A3 Tool/software: Hi
I am working on the DM core of the AM62A, and I am trying to setup an interrupt for GPIO37, which is owned by the main core. I am having trouble setting up this pin IRQ to fire.
This IO (GPIO37) is on bank 2, and…
Part Number: AM62A3 Tool/software: Hello, The current SDK supports a maximum of 32 (TIVX_KERNEL_MAX_PARAMS) parameters for the kernel. Is there a way to increase this parameter count? We would like to increase the number of parameters.
Hello Ning,
I have gone through the datasheet of the respective flash parts.
What I have seen is that none of them mention the JESD216D and JESD251 compliancy.
Can you check with the flash part manufacturer on the above two complaints?
Regards,
Vaibh…
Hi All,
Refer below results on the MAC to MAC interface testing.
One thing I would like to add regarding delays is that in RGMII mode the CPSW automatically adds a 2nS delay to the TX clock respective to the TX data. This is a fixed delay. In a MAC to…
Part Number: AM62A3 Other Parts Discussed in Thread: AM5726 Tool/software: Hi Expert,
Customers using AM5726 to develop products require video Input Port (VIP).
However, AM5726 is not recommended for use in new projects.
Is there any suggested SOC that…
Part Number: AM62A3 Tool/software: Hello!
I am working on the AM62A SoC, and trying to have the DM R5 core access and operate the MCU CAN0/CAN1 busses. Typically, these 2 CAN busses are operated by the MCU core, but in my use case, I am looking for them…
Part Number: AM62A3 Tool/software: Hi all,
one of our customers has been adding to the DM core firmware, while retaining existing functionality the firmware builder includes into this firmware.
The TRM shows that MCU_MCAN registers are accessible to…
Part Number: AM62A3-Q1 Other Parts Discussed in Thread: AM62A3
Tool/software:
Hello TI, We are trying to configure 88E1512 with AM62a3. Bellow are my device tree configurations:
&cpsw3g {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default…
