Part Number: DAC3174 Other Parts Discussed in Thread: TRF3705 , Hello,
I tried the setup as suggested here ( previous question ), but I'm not getting no signal at the Output for I/Q at all. I'm measuring only 50mV, which is almost zero, ,but no signal…
Part Number: DAC3174 Hello, DAC3174 datasheet page #1 says the power dissipation is 460mW. I think this number is at 500MSPS. My customer would like to use DAC3174 at 5.12MSPS. In this case, roughly how much would the power consumption be? Best regards…
Part Number: DAC3174 Other Parts Discussed in Thread: CDCLVP1208 Hello,
I have a couple of queries regarding the DAC3174 Circuit Design which are explained as follows:
1. I am using a DAC3174 IC in one of my new projects and as I can see the clock…
Part Number: DAC3174 Dears,
Could you help to review the two schematic, thanks!
two DAC are synchronized;
Output ±5V single-ended signal;
100MSPS
DAC3174 synchronization.pdf
DAC70508 output.pdf
Part Number: DAC3174
Hello,
I designed a PCB with 8 DACs from the DAC3174 and I want to test my PCB with an easy setup.
I set my FPGA for 12-bits and have two registers (e.g. memory_I & memory_Q each with 100x12 data). These data I can stream in…
Part Number: DAC3174 Hello,
We are using DAC3174 in our boards in which its input data is coming from the FPGA. I would like to test the DAC standalone to address the design or code issues related to the DAC. Here are the values I have set for the internal…
Part Number: DAC3174 Other Parts Discussed in Thread: CDCE62005 Hi Team,
My client has a problem:
DAC1 and DAC2 analogs' output signals are not synchronous (single-chip with synchronous two-channel output). At present, the DATACLK and DATA signals…
Part Number: DAC3174
Description:
1. When we are trying to check for the IO test pattern it is failing for the pattern given in the datasheet
2. So we are writing 0s in all the IO test pattern reg yet it is failing in 1st attempt whereas when…
Part Number: DAC3174 Hi,
We are planning to use DAC3174 with FPGA. As we are planning to develop module, we wanted to know more about IOpattern test in Dual mode, Dual bus as there will be no frame, sync because of daul bus, dual clock mode. Also…