Part Number: DAC37J82 Other Parts Discussed in Thread: ADC09DJ1300 Can you please advice of the ECCN export license classification for the following parts:
DAC37j82
ADC09dj1300
Part Number: DAC37J82 Hello, I'm having some issue initializing the DAC37J82 device.
What I'm trying to do is set up two JESD lanes on the SERDES lane0 & lane1 (RX0 and RX1) inputs, assign them to JESD lanes 0 and 1 in a single link0, pass them through…
Part Number: DAC37J82
Need Help with DAC37J82 configuration, No output at Analog output pins !!
We are using DAC37J82 with JESD204B protocol, connection to FPGA SOM - Xillinx Zynq Ultrascale+ MPSoC ZU19EG, using LMK04828B as Clock distributor, supply…
Part Number: DAC37J82 Other Parts Discussed in Thread: DAC37J84 , LMK04806 , Hello,
My customer wants to use the DAC37J84 under the following conditions.
- DACCLK P/N (Input CLK) = 1258.2912Mhz (From LMK04806) - DACCLK (PLL out) = 943.7184Mhz (DAC PLL used…
Part Number: DAC37J82 Other Parts Discussed in Thread: LMK04808 Hello,
My customer received support as below link for DAC37J82 no output issue.
The previous thread is locked, so we open a new one here.
- https://e2e.ti.com/support/data-converters-group…
Part Number: DAC37J82 Other Parts Discussed in Thread: DAC38RF83 , DAC38RF93 , DAC38RF80 Dear all,
We need to implement a Tx architecture using 2x (DUC + DAC) similar to DAC38R93 but we need a sampling frequency much lower than 9 Gsps. We need a frequency…
Part Number: DAC37J82 Hello,
My customer has an issue that the DAC37J82 they designed have no output.
They are using the DAC37J82 with the following conditions.
- DAC Data Rate input : 245.76Mhz
- Lane : 4 (LMF = 421)
- Interpolation : 2
- DAC Output…