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  • RE: DAC38J82: DAC38J82 cannot output with high fail rate

    Hi Jim, I have shorted the TRSTB pin to ground(connect J3 pin to J2 pin), but the DAC38J82 still cannot output an normal waveform, only high voltage level. Do you have any suggestion? Thanks!

  • RE: DAC38J82: DAC gives an error - read_empty : FIFO is empty

    Evgeniy, You must get SYNC to toggle for the link to come up. Make sure you are following all steps, especially 13 and 14, of the Initialization section shown in section 8.3 of the data sheet. Regards, Jim

  • DAC38J82: DAC SYNC not asserted after decrease lane rate

    TI Thinks Resolved
    Part Number: DAC38J82 Other Parts Discussed in Thread: DAC38J84EVM , LMK04828 Hi there, We have a working system with Xilinx Ultrascale FPGA JESD204 TX to DAC38J82. The FPGA JESD is configured at 8 Lanes with lane speed at 10Gbps. Reference clock to both…
    • Answered

  • DAC38J82: Coupling capacitor placement location

    Resolved
    Part Number: DAC38J82 Hello TI Tea, I am using DAC38J82 in my new module. I saw the pictorial representation to place ac coupling capacitor of JESD204B line near to transmitter device in TEXAS INSTRUMENTS JESD204B Physical Layer training material. But…
    • Resolved
    • Answered

  • DAC38J82: AC coupling capacitor placement for JESD interface

    Resolved
    Part Number: DAC38J82 Other Parts Discussed in Thread: DAC38J84 Hi, I am using DAC38J82 DAC IC. For JESD interface,it is mentioned in your training material "TEXAS INSTRUMENTS JESD204B series The Physical Layer PHY" that the ac coupling capacitors has…
    • Resolved

  • DAC38J82: FIR filter details

    TI Thinks Resolved
    Part Number: DAC38J82 Hi From the data sheet both the inputs to and the outputs from the FIR filters seams to be 16-bits. But I am unable to find, from the data sheet, any detailed description of the resolution and where and which bits are dropped, rounded…
    • Answered

  • DAC38J82: Interpolation details

    Resolved
    Part Number: DAC38J82 Other Parts Discussed in Thread: DAC38RF82 Is the interpolation done in steps of interpolate by two, where one zero is inserted between all samples and one FIR filter is applied, or are all zeros inserted between the samples at once…
    • Resolved
    • Answered

  • DAC38J82: How to turn on NRZ output mode

    Resolved
    Part Number: DAC38J82 Hi team, Here is a question from one of our customers: When using DAC38J82EVM , I use DDS on FPGA to generate a sine wave and output it. The waveform measured by oscilloscope is as follows: Theoretically, it should be a smooth waveform…
    • Resolved

  • DAC38J82: Serdes PLL cannot be locked, and FIFO reports an error

    Part Number: DAC38J82 Other Parts Discussed in Thread: LMK04828 Hi team， When one of our customers used DAC38J82 for development, Serdes PLL could not be locked after configuring parameters, and FIFO reported an error; The customers use DAC3XJ8X GUI v1.…

  • DAC38J82: DAC38J82 output issue in complex input

    Part Number: DAC38J82 Hello All, I'm working with DAC38J82 in a customised hardware. I'm having an issue in getting the DAC output. Here is my configuration. DAC input clock is 2457.6MHz. DAC PLL is not used. No SYSREF input. I'm trying to use…

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