Part Number: DAC38J84 Hi all,
I am trying to configure the DAC38J84 in a custom board. I have the DAC PLL locked and the PLL serdes locked but I am getting the FIFO empty error no matter what I try.
This is my configuration of the JESD IP core:
To sum…
Part Number: DAC38J84 After reading other posts/questions about the DAC38J84 and reading through the datasheet, I still have a question about the correct values to set the registers in the DAC38J84 for JESD204B operation using:
8 JESD204B lanes total…
Part Number: DAC38J84 In 7.3.27 of SLASE17B an equation is given to calculate IOUTFS. It is dependent on VEXTIO which is the same as VREF if the internal reference is used. Is there any way to determine a tolerance for IOUTFS given that only a typical…
Part Number: DAC38J84 Other Parts Discussed in Thread: TRF3705 Hi team,
I am not familiar with high-speed data conversion devices, could you help answer the following customer questions?
The NCO mode of the DAC38J84, can the phase between A and B outputs…
Hi Amy,
After re-reading this again, the SFDR value of 74.23 dB was measured on our EVM. The device was not characterized under the exact conditions you are using. However, looking at page 13 in the datasheet you can extrapolate that a SFDR of 74.23 dB would…
Part Number: DAC38J84 Hi Team,
As the tittle, I wonder what's the maximum rate of DAC38J84's SPI interface?
Period of SCLK is 100ns typically in datasheet, can it up to 50ns(20MHz)?
BR
Adrian
Part Number: DAC38J84 I'd like to verify that the JESD204B parameters have been received correctly during the ILAS sequence. The datasheet is unclear on which registers are RO and which are RW, so I'm not sure if they represent the received data, or the…
Part Number: DAC38J84 Other Parts Discussed in Thread: LMK04828 ,
Hi everyone,
I am trying to use DAC38J84 at it's highest sampling rate. There are 8 JESD lanes on my board which works at 10Gbit/s. I use LMK04828 as a clock source.
I can use the DAC…
Part Number: DAC38J84 Other Parts Discussed in Thread: LMK04828 Hi
I am using LMK04828 PLL from which clock is given to 2 DACs. Clock is provided to all 2 DACs simultaneously and the clocks are synchronised.
NCO reset is also done simultaneously.
Issu…
Part Number: DAC38J84 Hi Teams,
I'm evaluating DAC38J84 according to SLAA696 DAC38J84 device initialization and sysref configuration . However, I came across several problems. Can you help me to solve these issues?
1, SYNCB will be pulled low, after…
