Part Number: DAC38RF82 Tool/software: Hello, I am Jeon Il, a development engineer in Korea. I'd like to purchase the DAC chip and evaluation board of DAC38RF82 sold by TI, and I'd like to do a simulation in advance. However, the file provided is…
Part Number: TSW14J50EVM Tool/software: Is there any way to evaluate the higher output when I saw a DA output of 384 MHz in the example of using a separate clock from the TSW14J50 board and PLL on the DAC evaluation board? And I would like to ask if two…
Part Number: DAC38RF82EVM Other Parts Discussed in Thread: DAC38RF82 Tool/software: Hello, TI manager, I am JEON, a development engineer in Korea. I would like to purchase the DAC chip and evaluation board of DAC38RF82 sold by TI It seems to be using TSW14J50…
Part Number: DAC38RF82 Tool/software: Hello,
We want to confirm a potential configuration for DAC38RF82 for our application.
We would like to output two I/Q streams from an FPGA, and they need to avoid overlap at the RF frequency.
Let's say we have two…
Part Number: DAC38RF82 Tool/software: Hello,
I downloaded the IBIS model for part number DAC38RF82 from the TI website; however, the IBIS model does not include the Tx portion.
https://www.ti.com/product/DAC38RF82#design-tools-simulation
Could you…
Part Number: DAC38RF82 Tool/software: Hello, I have a question regarding the SYSREF timing relation with DACCLK, when using the DAC's internal PLL to generate the sampling clock. In our system we apply a 200 MHz clock to DACCLK input.
We use the internal…
Part Number: DAC38RF82 Other Parts Discussed in Thread: LMX2594 , Hi,
For our CCA, we are in need TI expertise to define the proper interface and termination for the SYSREF signal between LMX2594 (RFOUTB+/-) and DAC38RF82 (SYSREF+/-).
This is the last change…
Part Number: DAC38RF82EVM Other Parts Discussed in Thread: DAC38RF82 , DAC38RF82 The SYNC signal is high when it is powered on I encountered a problem when debugging the DAC38RF82, as soon as the chip was powered on, it remained high without JESD204B link…
Part Number: DAC38RF82 Hello,
I would like to confirm a proper configuration for DAC38RF82 for our application.
We need to create a baseband signal (coming from FPGA) of bandwidth between 50-100MHz (Internal data rate will be 100-200MSPS). This is a single…
Hi Oddbjørn,
Here is the feedback from design: There is not any internal source of offset that could explain the results. It is interesting that the amplitude of the tone is -53dB relative to fullscale – which is ~ 1/512, so maybe something with…
