Part Number: DAC38RF82 Tool/software: Hello,
I downloaded the IBIS model for part number DAC38RF82 from the TI website; however, the IBIS model does not include the Tx portion.
https://www.ti.com/product/DAC38RF82#design-tools-simulation
Could you…
Part Number: DAC38RF82 Tool/software: Hello, I have a question regarding the SYSREF timing relation with DACCLK, when using the DAC's internal PLL to generate the sampling clock. In our system we apply a 200 MHz clock to DACCLK input.
We use the internal…
Part Number: DAC38RF82 Other Parts Discussed in Thread: LMX2594 , Hi,
For our CCA, we are in need TI expertise to define the proper interface and termination for the SYSREF signal between LMX2594 (RFOUTB+/-) and DAC38RF82 (SYSREF+/-).
This is the last change…
Part Number: DAC38RF82EVM Other Parts Discussed in Thread: DAC38RF82 , DAC38RF82 The SYNC signal is high when it is powered on I encountered a problem when debugging the DAC38RF82, as soon as the chip was powered on, it remained high without JESD204B link…
Hi Oddbjørn,
Here is the feedback from design: There is not any internal source of offset that could explain the results. It is interesting that the amplitude of the tone is -53dB relative to fullscale – which is ~ 1/512, so maybe something with…
Part Number: DAC38RF82 Hello,
I would like to confirm a proper configuration for DAC38RF82 for our application.
We need to create a baseband signal (coming from FPGA) of bandwidth between 50-100MHz (Internal data rate will be 100-200MSPS). This is a single…
Part Number: DAC38RF82 Hello,
Our customer used DAC38RF82 for his application, when configuring DAC38RF82 81180 mode, 8G sample rate can be output, but 9G cannot output.
DAC38RF82 81180 9G mode does not output. Using internal PLL, input clock 281.25MHz…
Hi Mingming,
We do not have a tool for generating these. To make these tables I took the data sheet JESD frame format and used that to make the 32 bit data width that the FPGA uses.
The LMFS that you mention all have a F of 3, meaning that they have…
Hi Cherry,
Additionally, can you explain the format of the initial registers provided? Is this 8 bit address and 16 bit data?
I cannot get the link up using the customer's configuration. Please provide the customer with both of these files below to try…
If using LMF = 421, you can only have one NCO for DAC_A. If you are setting the VCO to 8.9GHz, the register values for a 1.2GHz NCO is as follows:
Page 1
Add 0x1E Data 0x1142
Add 0x1F Data 0x508A
Add 0x20 Data 0x2284
Not sure why you are talking about…
