Part Number: DAC38RF85 Hello.
On my board, I follow the instructions to get single tone output.
I adjust VCO frequency and VCO_LF voltage chenges to 3. I see that PLL is look.
But in output of DAC, negative voltage constant ~ -1V.
Then i set SPI constant…
Part Number: DAC38RF85 Hello.
I need generate signal with 600 MHz bandwidth, in the 1.2GHz carrier friquency.
If I understand correctly, i need genegate quadrature signal in zero carrier frequency, with sample frequency 600MHz. In the DUC, need set NC0…
Part Number: DAC38RF85 I am not getting consistent data read from the TEMP_PLLVOLT register between resets of the device.
All other registers seem to behave OK.
Sometimes after reset I am seeing negative values returned in the temperature (0xEAE2): tempdata…
Part Number: DAC38RF85 Section 8.3.1 of the datasheet ( bottom of page 39 ) references a LOOPBACK setting in SRDS_CFG1 register.
The section (8.5.86) describing the SRDS_CFG1 register has no LOOPBACK setting.
What is the loopback function and how can…
Part Number: DAC38RF85 Hopefully a v simple question here !
The datasheet indicates that the PAGE_SET register is valid when PAGE_SET[2:0] is 000.
Surely this is not correct, as once the register has been changed to select another page, you will never…
Part Number: DAC38RF85 On July 19 you supplied an XLSX spreadsheet with power consumption data as I'd requested. It is very useful.
Looking at it carefully now, it is missing the current and power on several of the power supply inputs.
They are VDDIO18…
Part Number: DAC38RF85 Tool/software: Linux Dear Sir,
Could you have JESD204B Pattern Test verify sequences for register setup? What's register address and data bit for monitoring lane alarms?
Thanks,
SJ
Part Number: DAC38RF85 Is there any data available regarding the startup time for this device ?
How long after device reset before the SPI interface is usable ?
How long after device reset before the AUTOLOAD_DONE bit is asserted ?
Part Number: DAC38RF85 The datasheet has the following data for the BUSWIDTH field in register SRDS_CFG2:
Bit: 4:2
Type: R/W
Reset: 010
Description: Selects the parallel interface width ( 16 or 20 bits). 0: 20 bits 1: 16 bits
Is this decode and/or reset…
Part Number: DAC38RF85 The Register Maps section of the datasheet appears to contain 3 different sets of reset values for each register.
There is a reset value in the section header for each register.
There is a "value after reset" for each bit in the…
