Part Number: DAC39J84 Hi
I'm trying to use the boundary-scan on the DAC39J84, but once the TAP set ins sample mode, the DAC stop sending data (see logic analyzer result below).
I'm able the set the tap in BYPASS or IDCODE mode and get the right IDCODE…
Part Number: DAC39J84 Hi
We are using DAC39J84 chips in developing our own mezzanine products. We are running into issues, where we can't communicate with DAC chip via SPI lines. We had almost 40 boards out of which more than half have the same issue…
Part Number: DAC39J84 Hello,
We have built several prototypes (30) using the DAC39J84 device. Some of the boards seem to work properly, but 1/2 of the boards have lane errors. This is a simple FMC card, the diff pairs are relatively short from the FMC…
Hi Matthew,
1) For the “markings” I see a TI logo, the part #, and a lot trace code. No surprises or concerns here. When I googled ‘ti lot trace code’ I found this,
What is a Lot Trace Code (LTC) and where can I locate it?
The Lot…
Part Number: DAC39J84 Other Parts Discussed in Thread: DAC38J84 On the TI website, under information for this part (DAC39J84), the ibis file is for another device (DAC38J84). Is this an error, or is the ibis file the same for the 2 devices (DAC39J84 and…
Part Number: DAC39J84
Hello Support !
I'm trying to use the boundary-scan on the DAC39J84, but once the TAP set ins sample mode, the DAC stop sending data (see logic analyzer result below).
I'm able the set the tap in BYPASS or IDCODE mode and get…
Part Number: DAC39J84 Other Parts Discussed in Thread: DAC38J84 Hi there,
Can I please have access to the DAC39J84 BSDL file for boundary scan purposes?
Thanks!
Part Number: DAC39J84 Hi there,
There is a term "complex bandwidth (BW)" in Table 11 of DAC39J84 datasheet (SLASE48A).
In our case, we have DAC39J84 running at 1 GSPS (without interpolation). Therefore, the analog bandwidth is 500 MHz in our…
Part Number: DAC39J84 Other Parts Discussed in Thread: LMK04828 Hi there,
I have multiple DAC39J84 ICs to be synchronized. Each DAC39J84 is clocked by an LMK04828.
In a related thread , ±1 VCO cycle error for LMKs' output device clock aligning was found…
Part Number: DAC39J84 Are there any pullup or pulldown requirements for the jtag interface? In the evaluation board package it does not show any aside from the TRST needing a pulldown when JTAG is not in use.