Search tips
Showing 99 results View by: Thread Post Sort by

  • DAC39RF12: Request for Resources to Integrate DAC39RF12 with XCKU5P FPGA

    TI Thinks Resolved
    Part Number: DAC39RF12 Other Parts Discussed in Thread: TSW14J58EVM , , DAC39RF10EVM , DAC39RFS10 , DAC39RF10 Tool/software: Hello, I am currently working on integrating the DAC39RF12 into a custom design based on the Xilinx XCKU5P FPGA. For initial…

  • DDS39RF10: a good solution or product of signal generator

    TI Thinks Resolved
    Part Number: DDS39RF10 Other Parts Discussed in Thread: DAC39RF10 , DAC39RF20 Tool/software: Hi， I want to design a signal generator that can output various pulse signals, such as exponential growth and attenuation signals, Gaussian signals, etc., and…

  • DDS39RF10: Looking for a proper DDS module with just serial or parallel cmos or ttl interface

    TI Thinks Resolved
    Part Number: DDS39RF10 Other Parts Discussed in Thread: DAC39RF10 , DAC12DL3200 Tool/software: I'm looking for a proper DDS which has a minimum internal clock rate of 3.5 GSPS upto 6 GSPS specifically something like AD9914 from ADI. Most of the TI boards…
    • Answered

  • LMX2615-SP: PLL lock fail in low temperature

    Resolved
    Part Number: LMX2615-SP Other Parts Discussed in Thread: DAC39RF10 , ADC12DJ3200 Tool/software: Hi, Customer is using LMX2615 for DAC39RF10 and ADC12DJ3200. output clock is 8388.608MHz for DAC and 2097.152MHz for ADC. Under low temperature around…
    • Resolved
    • Answered

  • LMK04828: SYSREF output produces 1.8ns wide runt pulse when SPI sync command sent

    Resolved
    Part Number: LMK04828 Other Parts Discussed in Thread: DAC39RF10 Tool/software: Hello, I have configured an LMK04828B (it is part of the DAC39RF10 EVM) to accept 135MHz input and produce 135MHz output on DCLK and 4.21875MHz SYSREF on the SDCLK output…
    • Resolved

  • ADC12DJ5200RF: JESD pattern maximum length

    TI Thinks Resolved
    Part Number: ADC12DJ5200RF Other Parts Discussed in Thread: DAC39RF10 , Tool/software: Hi, Customer would like to adopt 5u of ADC12DJ5200RF and 5u of DAC39RF10. To mount these all components, pattern length is over 100mm. Could you let me know what…

  • DAC39RF10EVM: Configuration review

    Part Number: DAC39RF10EVM Other Parts Discussed in Thread: DAC39RF10 Hello, My customer tried to test the DAC39RF10EVM with an FPGA evaluation board and failed. Please review whether there is a problem with the following two JESD204C/JESD204B settings…

  • DAC39RF10EVM: No output on the DCLKout ports of LMK04828b chip

    Part Number: DAC39RF10EVM Other Parts Discussed in Thread: LMX1204 , DAC38J84EVM , LMK04828 Tool/software: Hello, I am trying to configure a DAC39RF10EVM board connected to a ZCU102 (via an FMC+ to FMC adapter) but I am unable to get an output on the…

  • DDS39RF10: Data Path Latency Calculation

    TI Thinks Resolved
    Part Number: DDS39RF10 Other Parts Discussed in Thread: DAC39RF10 Tool/software: Hi, In the datasheet for DDSRF10 section 7.4.4 refers to an Excel Spreedsheet Calculator to calculate data path delays in both subclass 0 / subclass 1 mode. There is…

  • DDS39RF10: Decoupling requirements

    TI Thinks Resolved
    Part Number: DDS39RF10 Other Parts Discussed in Thread: DAC39RF10 Tool/software: We are making a new design including the DDS39RF10. During the design we are looking at decoupling the DAC and are wondering if the DDS39 have on chip decoupling? By looking…

Didn't find what you are looking for? Post a new question.