Part Number: DAC39RF10EF Hi team,
For the DAC39RF10EF, my customer plan to cut costs by removing the balun and switching to a single-ended output scheme. For the unused DACOUT pin, do they still need a bias-T? If they can skip the bias-T, how should…
Part Number: DAC39RF10EF Hi:
I tested the output amplitude of DAC39RF10EF at low frequencies and found that the output amplitude is very low below 3MHz. Is this a characteristic of DAC39RF10EF itself or is it limited by the bias-T? The bias-T used is…
Part Number: DAC39RF10EF Other Parts Discussed in Thread: DAC39RF12EVM Hi,
One of the engineers from ELTA has reached out, they have an EVM from 2022 and wanted to ask if there is a more recent version of the EVM that came out since then. is there?…
Part Number: DAC39RF10EF Tool/software: Please help provide the FPGA engineering file for the DAC39RF10EF device. I can not modifiy the bit files which in TI website.
Part Number: DAC39RF10EF Other Parts Discussed in Thread: DAC39RF10 Tool/software: Hello,
We are testing DAC39RF10 IC and we would need to know if the following configuration is possible:
- 1 -> PRBS generator inside one FPGA (generating PRBS31…
Part Number: DAC39RF10EF Hi team,
Here is a question from one of our customers, could you please leave your comments?
When using the JESD204B protocol, when L=8, if it is dual-channel data, How is the data framed? Is the first 8 channels used directly…
Hey Shahar,
This device is not export friendly. We do have an export friendly version of the DAC39RF10 ( DAC39RF10EF ) which automatically reduces input resolution for higher bandwidth modes to maintain export compliance. The RF10 family has a maximum…
