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  • DAC53204: About IOUT tolerance (min/max)

    Part Number: DAC53204

    Hi team,

    I would like to know the IOUT tolerance (min/max) of DAC53204RTER.
    And I would also like to know how to estimate it from the data sheet.
    I would appreciate it if you could answer.

    Best regards,
    Hiroyasu Makino

    Data converters forum Data converters

  • DAC53204: DAC53204 - SPI MODE

    Part Number: DAC53204

    Hello, 

    what SPI modes are supported by DAC53204? 

    Data converters forum Data converters

  • DAC53204: Communication with FT4222

    Part Number: DAC53204

    Hi,

    We are trying to margin our LDO's output voltage with DAC53204 which is communicated with UMFT4222EV module for I2C lines. While we try to margin with DAC53204 We are not able to communicate with DAC53204. Can you please guide us in solving it. Also we are facing this below error.

    Thanks

    S Sathya shree

    Data converters forum Data converters

  • DAC63204EVM: DAC53204

    Part Number: DAC63204EVM

    Hi,

    We have used the DAC53204 in our design.

    We are trying to communicate with DAC using FT4222EV module & DAC6320EVM GUI. 

    I am unable to success in reading device id in the front panel application (DAC6320EVM).

    Please help to solve the issue.

    Also please share the python packages available for this module or share the code base if its available.

    Registers|DAC_0_MARGIN_HIGH FF00
    Registers|DAC_0_MARGIN_LOW 0000
    Registers|DAC_0_IOUT_MISC_CONFIG 1000
    Registers|DAC_0_DATA 9990
    Registers|COMMON_CONFIG 0FF6
    Registers|COMMON_DAC_TRIGGER 0000

    Data converters forum Data converters

  • DAC53204: VOLTAGE LEVEL TRANSLATION

    Part Number: DAC53204

    Hi,

    To perform voltage margining through DAC53204RTER. We have used MUX with I/O voltage of 1.8V to drive the I2C lines of DAC. DAC's I/O voltage is 5V.

    We are planning to use I2C level shifter with smaller footprint/package. We found the parts TCA39306 and PCA9306.

    Please let us know which level shifter can be used from the above two parts.

    Also attaching the design for your reference.

     

    Thanks

    S Sathya shree

    Data converters forum Data converters

  • DAC53204: VDD Voltage

    Part Number: DAC53204

    Hi,

    For DAC53204, What should be voltage VDD for margining the voltage rails(1.8V, 2.5V, 0.9V, 1.1V).  We gave 1.8V as VDD voltage and VREF voltage with current mode output. We are not able to margin the voltages 1.8V and above. Kindly provide the solution.

    Thanks

    S Sathya shree

    Data converters forum Data converters

  • DAC53204: Unused output pins

    Part Number: DAC53204

    Hello team,

    I received a question from the customer. 

    How should unused analog output pins be treated? 

    Regards,

    Masa

    Data converters forum Data converters

  • DAC53204-Q1: MCU needs to write commands in RST-CMP-FLAG-X bit at each latch cycle?

    Part Number: DAC53204-Q1

    Tool/software:

    Hi team,

    Regarding programmable hysteresis comparator in DAC53204-Q1, MCU needs to write commands in RST-CMP-FLAG-X bit at each latch cycle. Is my understanding correct? 

    Best regards,

    Shunsuke Yamamoto

    Data converters forum Data converters

  • DAC53204: 4-Wire SPI not working

    Part Number: DAC53204

    Hi,

    I have a DAC53204 that I'm intending on using in 4-wire SPI mode.  I am using the following programming sequence and am not seeing the expected results.

    #define DAC53204_REG_COMMON_TRIGGER ((uint8_t) 0x20)
#define DAC53204_REG_GENERAL_STATUS ((uint8_t) 0x22)
#define DAC53204_REG_INTERFACE_CONFIG ((uint8_t) 0x26)

    // Unlock device registers
    uint16_t reg = 0x5000;
    err          = write_register(p_handle, chip_select, DAC53204_REG_COMMON_TRIGGER, &reg);

    // Enable SDO for 4-wire SPI.
    reg = 0x1;
    err          = write_register(p_handle, chip_select, DAC53204_REG_INTERFACE_CONFIG, &reg);

    // Validate the hardware by checking the ID register (read_register issues a NOP per Figure 7-15. SPI Read Cycle of TRM)
    err          = read_register(p_handle, chip_select, DAC53204_REG_GENERAL_STATUS, &reg);

    I'm currently seeing the following on my logic analyzer:
    CPOL=1, CPHA=0

    CPOL=0, CPHA=1

    After the SDO-EN bit is written, I do see MOSI go low which according to some other DAC53204 posts, seems to be the correct behavior.
    I do not see the DEVICE-ID (should be DAC53204: 02h) in the final NOP access in either case.  I do see that the MSB (bit 24) of the read access and NOP is set in 3 different points here but since that is not where the read data is coming from it doesn't seem important.

    Any insight on why I'm unable to read the DEVICE-ID?

    I have tried 0.5MHz and 1.0MHz SCLK frequencies.


    Thanks,

    Mark

    Data converters forum Data converters

  • DAC53204-Q1: Two channel PWM generation

    Part Number: DAC53204-Q1

    Hi team,

    My customer requires 2ch PWM signal for LED indicator. DAC53204 should be a candidate for such application. Can DAC53204 be used for such application with attached configuration? If the configuration is wrong, please let me know.

    DAC53204_2ch_PWM_generation.pptx

    Regards,

    Saito

    Data converters forum Data converters

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