Part Number: DAC5662 Hello,
When using the DAC5662 in interleave mode, it is only briefly mentioned on how to use RESETIQ.
Are there more example timing diagrams somewhere that are more detailed than Figure 7-4 in the datasheet?
Thanks!
Part Number: DAC5662 Other Parts Discussed in Thread: DAC5675A Hello,
I considering interface circuit for DAC5662 using OPAMP IC. Below circuit is current/voltage conversion circuit to convert DAC5662 output current to voltage.
The DAC5662 datasheet…
Part Number: DAC5662 Hello,
I am calculating error of output current of DAC5662.
I would like to know temperture coefficient of internal reference voltage of 1.2V. (ex. temperture coefficient: xxx uV/degC).
Regards,
MESH
Part Number: DAC5662EVM Other Parts Discussed in Thread: DAC5662 Now I consider using DAC5662 EVM.
I would like to confirm connector J1 output voltage swing (sine wave x.x Vp-p) at below conditions for DAC5662 EVM.
I want to check the operation before…
Part Number: DAC5662 The settling time specification for the DAC 5662 test condition refers to a mid-scale transition and is specified at 20nsec typical.
Please elaborate, does this mid scale transition infer that the DAC output goes form 0 out to…
Part Number: DAC5662 I design circuit using DA converter DAC5662. Now I consider derating analysis for DAC5662. I would like to confirm absolute maximum rating of IOUT output current. I will calculate derating value below. Derating value (%) = (actual…
Part Number: DAC5662 Other Parts Discussed in Thread: TMS320F28335 , Hi,
DAC5662(DAC) how to interface with TMS320F28335??
will you please give any application circuit for DAC5662???
Thank you.
Regards,
D.Sangeetha
Part Number: DAC5662 Maximum output update rate of DAC5662 is 275MSPS.
However I will use DAC5662 output update rate of 10MHz (10MSPS) due to restriction of controller circuit (Host circuit).
I would like to confirm that there is no problem in the…
Ok. If I want for example 8 independent analog outputs and i want change level on all 8 Outputs in one time i must do one clock impulse. I can't running CLK all time! If i will do schematics like in figure 1, one FPGA or uC, 4 DAC5662, one BUS for 12…