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Showing 10 results View by: Thread Post Sort by
  • RE: DAC5662A: How to reduce delay time?

    dBrock
    dBrock
    Hi Shaka, We are reviewing your questions, and will be back with you soon. Best Regards, Dan
    • over 7 years ago
    • Data converters
    • Data converters forum
  • Answered
  • DAC5662A: data input voltage of CMOS interface.

    downey KIM
    downey KIM
    Resolved
    Part Number: DAC5662A Hello. below FPGA output spec. FPGA output MIN voltage is 2V. and DAC5662A Vih spec is 2V. Is there a problem with the communication between the two devices? I wait for your answer. please reply about my question…
    • Resolved
    • over 7 years ago
    • Data converters
    • Data converters forum
  • DAC5662A: Output regulation with variable amount of IOUTFS (IREF ) by an operational aplifier

    Robert Thomas21
    Robert Thomas21
    TI Thinks Resolved
    Other Parts Discussed in Thread: DAC5662A Hallo support team, we want to use the DAC5662A in order to drive our outputsignal. The outputcurrent should be variable in a range of 20dB. The outputcurrent is controlled by IOUTFS (IREF=32xVREF/RSET). …
    • over 9 years ago
    • Data converters
    • Data converters forum
  • Answered
  • DAC5662A - Output latency

    Lance Doyle67023
    Lance Doyle67023
    Resolved
    When looking at the AC timing, the parameter Tlat shows 4 clocks. Does this mean that the DAC is pipelined and intended to have a continuous clock feed? In other words, it is not intended for asynchronous writes. Can someone please confirm or dispute…
    • Resolved
    • over 14 years ago
    • Data converters
    • Data converters forum
  • Answered
  • RE: DAC5662: ESD rating

    Neeraj Gill
    Neeraj Gill
    Resolved
    Hi Carlo, We don't ESD rating for DAC5662. Anyhow I would recommend using DAC5662A instead which is same device but voltage requirement between AVDD and DVDD is relaxed. Here are ESD rating for DAC5662A. Regards, Neeraj
    • over 5 years ago
    • Data converters
    • Data converters forum
  • RE: Fast DAC for generating sine wave up to 5MHz with fast startup time

    Neeraj Gill
    Neeraj Gill
    Hi Patryk, Please take a look at DAC5652A. www.ti.com/.../dac5652a . The update rate is 275MSPS and it is parallel CMOS device. DAC5652A is 10 BIT device but the same family also has 12 BIT(DAC5662A) and 14 BIT (DAC5672A). Regards, Neeraj
    • over 7 years ago
    • Data converters
    • Data converters forum
  • Line Buffer for DAC5662 with f_clk=48MHz

    Andreas Arnold
    Andreas Arnold
    Other Parts Discussed in Thread: DAC5662A Hey there, I want to operate a DAC5662A with a clock frequency of 48MHz. The clock and the data comes from motherboard equipped with a Xilinx FPGA and the DAC will be on a analog I/O daughtercard. I searched…
    • over 12 years ago
    • Data converters
    • Data converters forum
  • Answered
  • RE: DAC5662: Output voltage compliance range of DAC5662

    Neeraj Gill
    Neeraj Gill
    Resolved
    Hi Mesh, Yes there is no problem with the figure 22 in the datasheet. Here is the link to the application note. Section 2.3 talks about how the compliance voltage for the DAC is calculated. Regards, Neeraj
    • over 5 years ago
    • Data converters
    • Data converters forum
  • RE: DAC5652A: DAC5652A

    Neeraj Gill
    Neeraj Gill
    Hi Eli, Please recommend using the DAC5652A - it has same performance, but does not have as strict power sequence requirements. The AVDD and DVDD can come up independently. The AVDD-DVDD maximum voltage difference requirement on DAC5652 is +/-0.5V …
    • over 6 years ago
    • Data converters
    • Data converters forum
  • RE: DAC5652: On Switching Characteristics of DAC5652

    Neeraj Gill
    Neeraj Gill
    Hi Fukazawa-san, The clock latency is fixed value of 4 clk cycles and it is constant over power ups, temp, manufacturing lot. Regards, Neeraj
    • over 6 years ago
    • Data converters
    • Data converters forum

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