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Showing 5 results View by: Thread Post Sort by
  • DAC5675-EP: Data for power consumption vs. sampling rate

    Graeme Smecher
    Graeme Smecher
    Part Number: DAC5675-EP Other Parts Discussed in Thread: DAC5652-EP , DAC5662-EP , DAC5672-EP , DAC5687-EP , DAC5670-SP Do you have any data points or a graph showing power consumption as a function of sampling rate? For example, see the AD9146 datasheet…
    • over 5 years ago
    • Data converters
    • Data converters forum
  • DAC5675-EP: lowering Clk speed and reducing power consumption?

    AnBer
    AnBer
    Part Number: DAC5675-EP Other Parts Discussed in Thread: DAC5675 Team, Looking at the DAC5675-EP datasheet - SGLS381A page 7: -Only typical Clock pulse width (tw(H)/Tw(L)) are given. Can the DAC operate with a CLK speed as low as 1Mhz? What would be…
    • over 5 years ago
    • Data converters
    • Data converters forum
  • Answered
  • DAC5675-EP Clk Driver

    Kim Xin
    Kim Xin
    Resolved
    Other Parts Discussed in Thread: DAC5675-EP , DAC5675 Hi, I was wondering how I can drive the clocks of DAC5675-EP with LVDS. I am using LVDS outputs of an FPGA to generate clocks for the DAC, however, the DAC accepts LVPECL. After looking at the…
    • Resolved
    • over 9 years ago
    • Space & High Reliability (Read Only)
    • Space & High Reliability Forum (Read Only)
  • Answered
  • DAC5675

    Jonny Johansson
    Jonny Johansson
    Resolved
    Other Parts Discussed in Thread: DAC5675-EP The data sheet of current-sinking D/A converter DAC5675-EP states that "the outputs are terminated to AVDD and have a voltage compliance range from AVDD -1 to AVDD +0.3V". In an Analog Applications Journal,…
    • Resolved
    • over 14 years ago
    • Data converters
    • Data converters forum
  • DAC5675A-SP: driving the clock pins with LVDS signal

    York Sung
    York Sung
    TI Thinks Resolved
    Part Number: DAC5675A-SP Other Parts Discussed in Thread: DAC5675 , DAC5675A , CDCLVP111-EP , SN65LVDT101 We are using the DAC5675 on a space project (LEO missions) and we are thinking about driving the clock_p and clock_n with LVDS signals generated…
    • over 3 years ago
    • Data converters
    • Data converters forum

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