Part Number: DAC5675AEVM Hello,
I am testing DAC5675A EVM. The problem is that no DAC output signal occurs.
The state of J8 was always 'HIGH' and never changed.
I setup test environment following 'DAC5675A EVM Quick Start Guide' document.…
Part Number: DAC5675AEVM Questions regarding TI Device DAC5675AEVM:
(1) Jumper W3: What does LVDS line driver enable mean?
(2) Jumper W3: What is the difference between outputting 3-state and outputs enabled?
(3) ECL/PECL Clock: How do you configure/use…
I saw that, but I have adapted the TSW1400 LVDS output connector to the DAC5675A header.
So, assuming my adapter is connected correctly, can the TSW1400 FPGA be configured to send LVDS data to the DAC5675AEVM?
Other Parts Discussed in Thread: DAC5675A Hello,
I would like to do several tests with a DAC5675AEVM driven by a TSW1400EVM. I know that just
the CMOS port can be used because there is no DAC5675A .ini file and no firmware. I also know that
there is a…
Other Parts Discussed in Thread: ADS5474EVM , ADS5474 Hi,
I working on HSMC AOB based High speed Data conversion board Interfaced Altera's Stratix IV GX.
Please share Gerber Design files or link for ADS5474EVM and DAC5675AEVM for reference.
Mrudang …
Hello Jim,
I understand that I cannot give out information about the software source.
Apart from that, we received a related question from the customer about the connection.
It would be helpful if you could confirm that the resistance values of R5 and…