Part Number: DAC63204 Other Parts Discussed in Thread: DAC63004 , Hello,
Can the DAC63 2 04RTER and DAC63 0 04RTER be used interchangeably without modifying firmware, or are there functional differences between the two that prevent this?
Thank you,
Kyle
Part Number: DAC63204 Other Parts Discussed in Thread: LM3243 , Hi,
I'd like to implement the circuitry for controlling and adjusting the ramp-up time from 0V to target voltage.
I'm going to use DAC63204 and LM3243(Buck Converter).
Would please…
Part Number: DAC63204 Hi Team,
This post is related to our customer's application of DAC63204 with TLC59401RHBR which I post in the link below.
https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1211334/tlc59401…
Part Number: DAC63204 Is there any special action required in order to be able to change the function generator slew-rate?
I have test code that successfully sets up the DAC0 output to generate a sine-wave:
// First value (word) is the data, second…
Part Number: DAC63204 1) power up device (I am using the EVM card without the USB host - the host won't recognize the eval software. Pulled all the host related jumpers)
2) try to unlock chip and set to 4 wire SPI. It does not seem like the chip even…
Hi Moldovanu,
This timing diagram is correct. Each device will accept the last 24 bits of data it sees before the rising edge of chip select. In your screenshot, device 2 is seeing register 0x26, data 0x0005 and device 1 is seeing register 0x00, data…
Part Number: DAC63204 In regards to the DAC63204 component, the datasheet mentions it can provide a +/-250uA current output if some register values are changed. Does the applied reference voltage play a factor in the obtainable current output range? Or…
Part Number: DAC63204 can anyone provide reference code to enable Voltage mode or the sequence of registers need to set in order to initiate the voltage mode and set output voltage.
your help will be greatly appreciated
Thank you for your support.
Part Number: DAC63204 Hello,
In SPI mode, what is a delay time between the rising edge of the SCLK and a stable new data at the SDO, a so called t_SDODLY?
It is marked on the Figure 6-3 and not defined in the tables, at least I didn't find it.
Thank…
Hi Pavel,
Your initial statement about the sampling capacitor leakage is correct.
Regarding the bullet points, you can find my comments in red:
I am measuring the DC voltage, so fast changes of it are not expected and also not interesting to me
the…