Part Number: DRA78XEVM Other Parts Discussed in Thread: SYSCONFIG QSPI_SYSCONFIG register, I don't understand the IDLE_MODE description clearly. Could you explain the difference action between No-idle mode and Smart-idle mode?
Thanks in advance.
Part Number: DRA78XEVM Other Parts Discussed in Thread: DRA789 The SOC part number is DRA789
NOR FLASH part number: MT25QL01GBBB
QSPI NOR Flash configurations as follows
memory map mode,
QSPI clock is 96MHz,
Read dummy clock cycles = 8,
Fast quad read…
Part Number: DRA78XEVM CodeComposerStudio for DRA89x stops with:
Buildfile generation error occurred.. Product com.ti.pdk.dra7xx v1.0.10 is not currently installed and no compatible version is available. Please install this product or a compatible version…
Part Number: DRA78XEVM I want to use DRA78xEVM for my project.
So, I am checking some information before I buy it.
This SoC chip supports all the DRA78x cores?
Is It configured with only software code?
Does it support all clock speed(500, 750, 1000MHz)…
Hi Jeeva,
We don't have an example for this.
Most of time DSP L1 and L2 are used for cache so it doesn't make sense to share that with other DSP.
For OCMC RAM, it can be shared by DSP1 & 2.
You can define a memory section in OCMC in both…
Part Number: DRA78XEVM Other Parts Discussed in Thread: DM505 , I am working on a design that includes the TI DM505. I’ve been referring to the DRA78XEVM ( https://www.ti.com/tool/DRA78XEVM#design-files ) but the native PCB layout file is in an Allegro…
Part Number: DRA78XEVM Other Parts Discussed in Thread: DM505 , Hello,
I’ve been using the DM505 for a new design and referring to the DRA78XEVM ( https://www.ti.com/tool/DRA78XEVM#design-files ) but the native PCB layout file is in an Allegro format…
Part Number: DRA78XEVM
Hi team,
As my acknowledge, the BE/LE is depend on the compiler, or could be setting in compiler. And there is no relationship with memory type or peripherals in my mind. So do you know why there is this restriction? <SBL userguide…