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Robert Eschler
1 month ago
Processors
Processors forum
RE: DRA78XEVM: PCB Layout Files for DRA78XEVM
I'm attaching the Gerber files for the design. We do not have available in any other format. 517541.zip
Vineet Roy
1 month ago
Processors
Processors forum
RE: DRA78XEVM: DRA78XEVM Layout/Gerber Data
This is a subset of this E2E, hence closing. Please follow above Regards Vineet
Hatem
10 months ago
Processors
Processors forum
DRA78XEVM: TESTING UART ON DRA78XEVM
TI Thinks Resolved
Part Number:
DRA78XEVM
I have created CCS project on CCS9 and used the file in C:\TI\pdk_dra7xx_1_0_10\packages\ti\csl\example\uart\uart_test But When I build the project I get these error Building file: "../UART_TESTS.cfg" Invoking...
Hatem
11 months ago
Processors
Processors forum
RE: DRA78XEVM: Building PDK
Thank you. I reinstalled the SDK and the build was successful.
user6000372
over 1 year ago
Processors
Processors forum
DRA78XEVM: RTOS/DRA78x: ip6if.h identifier "HANDLE" is undefined
Resolved
Part Number:
DRA78XEVM
Hello, When use ndk package I am getting errorfor missing prototype for IPv6
Hatem
11 months ago
Processors
Processors forum
RE: DRA78XEVM: Application Image for SBL
Hi Stephen, It was a strange built. I did rebuild the out files again and the out2rprc utility worked fine. No errors. As the out files which caused the errors were built few weeks ago, I can not figure out the differences between the previous...
Rishabh Garg
11 months ago
Processors
Processors forum
RE: DRA78XEVM: Device is held in reset. Take the device out of reset, and retry the operation.
Hi Hatem, You need to run <SoC>_MULTICORE_EnableAllCores script from the gel scripts on M4-0 before trying to connect to either DSP. Hope this helps. Regards, Rishabh
Hatem
11 months ago
Processors
Processors forum
RE: DRA78XEVM: Download ling for pdk_dra7xx_1_0_10
Thank you
Rishabh Garg
11 months ago
Processors
Processors forum
RE: DRA78XEVM: WHAT RPRC stands for in the SBL
Hi Hatem, RPRC format is described in section 3.3. Application Image. I am not sure about the full form, you can treat it as same. If you have any questions about the format please post a reply. Regards, Rishabh
Rishabh Garg
11 months ago
Processors
Processors forum
RE: DRA78XEVM: DRA78XEVM Boot Switch Configuration
Hi Hatem, SBL runs on the master CPU in this case it is M4 core 0. SBL can load app image for all cores including M4-0. Cores other than M4-0 are started by SBL whereas context is switched on M4-0 after SBL execution finishes. Any application can...
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