Tsurumoto-san,
Sorry for the delay. The DRA821A is no longer a planned variant of the DRA821. We have removed the landing page on ti.com and are in the process of updating the datasheet.
Regards,
Kyle
Part Number: DRA821U Is there a boot procedure flow diagram like that of AM65x training, which helps understanding.
The DRA821A has only one MCU for booting, since the MCU can be used for booting, why can't be used for customer software after booting…
Part Number: DRA821A Hi,
Customer wants to connect external WiFi/BT combo chip via PCIe 3.0 with 1DL to DRA821x.
Customer wants to use an internally generated PCIe reference clock.
The WiFi/BT chip has jitter requirement of max. 300 PPM.
Which of the…
Part Number: DRA821A Hi Team,
I am working with DRA821 SOC i wanted to know what will be the form of serdes clock 'from' SOC LVDS or HCSL
(will the SOC can provide ref clock for PCIE?)
Part Number: DRA821A There is a use scenario need to constantly forward data from USB3 port to PCIe(connect Wifi 6 module), the throughput should be OK, but still hope to know the latency from USB port to PCIe port.
I think there is not a hardware forwarding…