Part Number: DS90UB940-Q1 Other Parts Discussed in Thread: HD3SS3212 Hi Team,
I'd like to ask you about the application for multiplexing FPD-Link. There is a switch(HD3SS3212) for multiplexing between Ser 949 and Des 940. Please check the application of…
Part Number: DS90UB927Q-Q1 Hello,
One customer met one question during using DS90UB927+DS90UB940. The application is HOST(LVDS/I2C)--927--940--(CSI/I2C) display.
Now one strange phenomenon is that once 927 connected 940, then 927 is always send 0xD7 and…
Kailyn Chen said: In the pattern configuration mentioned above, if the total horizontal line width is changed from 1360 to 1350, the image cannot be captured correctly; so adjust the timing of the actual image, HBP = 32,HT = 1360, Hspw=32, VBP = 32, VT…
Part Number: DS90UB940-Q1 Other Parts Discussed in Thread: DS90UB929-Q1 , Hi
My customer was using DS90UB940-Q1 +DS90UB929-Q1. .
There are I2C master MCU at both DS90UB940-Q1 and and DS90UB929-Q1.
When enable DS90UB940-Q1 reg 0x5 bit 7 I2C_PASS_THROUGH_ALL and…
Part Number: DS90UB940-Q1 The output data type can be configured through CSICFG1 register. Can the OFMT be set to any of those values, or is it restricted by the IFMT setting?
Part Number: DS90UB940-Q1 What are the required register settings for ub940 when used with DS90UB925 and output CSI2 YUV422 signal? Are there any other caveats when using ub940 with ub925? What if the PCLK is lower than 25 MHz?
Part Number: DS90UB940-Q1 According to the datasheet, it seems that only the primary input pins can be used when set to backward compatible mode to work with DS90UB925Q. Just want to double check if it's the case. Thank you.
Part Number: DS90UB940-Q1
Hello team,
My customer is reviewing 949 and 940.
They plan to use I2S for audio implementation.
but I don't see information in datasheet about audio latency from video.
Could you pls help answer this to customer??
Thank…