Part Number: DP83TG720S-Q1 Other Parts Discussed in Thread: LM3880 , TPS22993 Hi Team,
Can you suggest a power management module that would allow the user to enter/exit the sleep mode feature of the phy ethernet DP83TG720S-Q1?
Can you confirm the combination…
Part Number: LM3880-Q1 Hi
On the datasheet, it is mentioned that there are 120ms period at incomplete power-down sequence.
1. What is happen if EN is asserted at that 120ms period? Do this device accept the EN assertion at that 120ms period?
2.If the…
Part Number: LM3880-Q1 Hi
Is there any limitation of EN pulse width?
The FLAG does not response if the small pulse of EN signal(High or Low) which is smaller than delay time is input.
Regards,
Koji Hamamoto
Part Number: LM3880-Q1 Hi
I have a question about the pull-up voltage of FLAGx pin.
At the datasheet, the recommend voltage of FLAGx pin is -0.3V~VCC+0.3V. However the abs max is -0.3V~6.0V.
Is it possible the FLAGx pin is pulled up to 5V when the VCC…
Part Number: LM3880-Q1 Other Parts Discussed in Thread: LM3880 Hi
I have a question about start up sequence.
Should we turn on the EN pin after VCC rise up? If it so, how much delay should we set on EN pin after VCC rise up?
At our configuration of VCC…
Part Number: LM3880
Hi,
I'm a user of LM3880MF-1AA.
I have two questions about "7.3.2 Incomplete Sequence Operation" in the datasheet.
Q1.
In Figure 7-3. Incomplete Power-Up Sequence,
what are the maximum and minimum…
Hi,
Thanks, customer would like something similar to LM3880 better if p2p.
I ask for additional information: which is the minimum low or high level of the EN pin to be recognized? If I had to generate a very short pulse of 1us on EN would it be caught…
Other Parts Discussed in Thread: TPS61175 , TPS1H100-Q1 , LM3880 Hi,
I am working on a circuit that has a +24 V switchable output (max. 1 A). The input voltage of +12 V is first boosted to 24 V using the TPS61175. Because I do not want +12 V at the output…
