Hello Fabio,
please can you fill out the quick start calculator with your requirements so I can check your design against it, thanks.
LM5163-LM5164DESIGN-CALC Calculation tool | TI.com
David.
Hui Kevin,
here are few comments on the LM5164 part of the schematic
For a typical vin (47V) and given circuit parameters, it is required to use RA=150k ~220kohm range for sufficient ripple at FB node
Please directly connect the EP and GND…
Hi Manu,
Can you please fill below excel sheet to review the schematic effectively?
https://www.ti.com/tool/LM5163-LM5164DESIGN-CALC
And what is the inductor and output capacitor part number used?. Please provide.
Thanks,
Nitya
Hello Ivy,
Looks like you do not have enough ripple voltage at the feedback nose of the LM5164. Strongly suggest using the calculator spreadsheet to determine the correct amount of ripple injection. Fill in the spreadsheet with your spec and it will…
Thanks for sharing Steven,
The ripple voltage on VOUT is expected to increase as the device goes into light load operation. I would double check your design to make sure you have optimal ripple voltage at the feedback node by using the calculator…
Hello Omer,
Yes, you can use the LM5164 in this application.
The output will be stable under all said conditions above. I recommend using the UVLO input to turn ON/OFF at specific voltages, but if you chose not to, that's an option for you.
…
Hi Nishanth,
When the load current is lower than half of peak-to-peak inductor ripple current, the minimum value of inductor current falls to zero, the device enters into DEM mode. In the DEM state, the load current is lower than half of the peak-to…
Part Number: LM5163 I'm struggling with the buck converter (42V -> 19V, 70mA). I've done a calculation in the WEBENCH tool and it gave me the suggested circuit below. It implise that at 300kHz switching frequency and 70mA load the circuit should run in…
Hello,
For your design, a minimum of 2.2uF of input capacitance is required. The output capacitance is also too low. Try using two, 22uF output capacitors and make sure they are properly rated for the output voltage to account for capacitor de-rating…
Hi Jayanthi,
The schematic looks ok. Can you confirm that the layout matches the layout guideline in section 10.2 of the DS? Is the feedback trace far away from the switching node?
Can you take a waveform of VOUT, VIN, SW (a few cycles), and FB in…
