Part Number: LMK04816 Hello,
I need to simulate and calculate phase noise of LMK04816 in the 0-Delay Dual PLL , using Clock Design Tool . I don't find the way to configurate this software to implement the configuration.
Note: This configurations has…
You are correct. Fixed phase relationship happened on phase-frequency detector, so we still should consider divider impact on phase uncertainty.
As you know, divider N would generate N kinds of different phase if there is no SYNC operation.
For LMK04816…
Other Parts Discussed in Thread: LMK04816 , LMX2581 As we knew, the lock time was dependent on the both phase error window size and PLL_DLD_CNT. for example, if we want to set the frequence error 13.75 ppm, we can choose the PLLx_WND_SIZE = 5.5 ns, and…
Other Parts Discussed in Thread: LMK04816 , LMK04806 , CODELOADER Hello all,
we are using the LMK04816 with the attached configuration (renamed to .txt, since .mac file upload is not allowed):
LMK04816_RegInit_Set0-mac.txt
[SETUP]
ADDRESS=888…
Other Parts Discussed in Thread: LMK04816 , CODELOADER Chapter 8.2 of the user manual lists the recommended programming sequence for the LMK04816.
The last bullet tells me to set the uWire_LOCK bit in register R31.
But the TI CoadLoader lists a value of…
Other Parts Discussed in Thread: LMK04816 Dear TI Team,
in the LMK04816 Manual, chapter 8.2.1, you describe the programming-sequence. The first step is to program R0 with RESET bit = 1. There are no recommendations regarding the other 26 bits of the register…
Other Parts Discussed in Thread: LMK04816 In Pin Select Mode R13[11:9] = 3, when Holdover is selected with pin Status_CLKin1 = 1 and pin Status_CLKin0 = 1, is it still needed to set R12[7:6] with HOLDOVER_MODE = 2 (enabled) to force entering holdover?…
Other Parts Discussed in Thread: LMK04816 , CLOCKDESIGNTOOL I’m looking at using the LMK04816 as central piece of our clk module. The new clk block is attached.
It seems that the LMK04816 is just a very good fit….
the External clk is 10MHz; …
Other Parts Discussed in Thread: LMK04816 , CLOCKDESIGNTOOL , CODELOADER Hello,
we try to use the LMK04816 in0-delay dual loop mode with internal PLL and internal feedback.
Input frequency at CLKin0 = 50MHz
External VCXO at 150MHz
Output frequency at all…
Other Parts Discussed in Thread: LMK04816 , CLOCKDESIGNTOOL Hello,
I plan to use the LMK04816 to clock several ADCs.
The input frequency of the LMK04816 can vary from 1kHz up to 100MHz, and the LMK04816 shall use it to make 10-80MHz sampling frequency for…