Part Number: LMK04832EVM Other Parts Discussed in Thread: USB2ANY Each time the device powers on, I have to use the TICS Pro software and the USB2ANY device to write the values to the registers. Is there a way for this to be done automatically? Be it…
Part Number: LMK04832EVM Other Parts Discussed in Thread: LMK04832 , LMK04610 , LMK03318 Hello,
First a little background:
I have your LMK04832EVM board hooked up to a Keysight DSO404A oscilloscope. I see an output on the CLKout I have selected however there…
Part Number: LMK04832EVM Hello,
Can you tell me the dimensions of the board? Or do you have any drawings or CAD files of the board you can send me?
Thanks!
Part Number: LMK04832EVM Hi teams,
About step2 in default setting: Connect a reference clock to the CLKin1* port from a signal generator or other source. Use 122.88 MHz for default configuration.
Exact frequency and input port (CLKin0/CLKin1) depends…
Part Number: LMK04832EVM Other Parts Discussed in Thread: LMK04832 , Hi, We're currently testing LMK04832 EVM using default configuration. We found that there is larege difference about waveform between 122.88 MHz and 61.44MHz.(showed as below) (Left …
Part Number: LMK04832EVM Other Parts Discussed in Thread: LMK04832 Hi, We were using the LMK04832EVM with a 100 MHz clkin1 input , replacing the original default configuration clkin1 122.88 MHz. Once we changed frequency from 122.88 MHz to 100MHz, the status…
Hello Yuval,
Regarding the open question.
I do not think the DCLK_DIV_ADJUST matters at all when DCLKX_Y_DIV = 1. Any full step adjustment would have the same phase relationship.
This is probably why it isn't on the datasheet.
Thanks,
Vibhu
Part Number: LMK04832EVM Other Parts Discussed in Thread: LMK04832 Hii team,
We are using LMK04832 EVM and programming it using TICS PRO tool. We are using the EVM for the first time and to have hands on experience we programmed it for CLKin1 = 122.88MHz…
Part Number: LMK04832EVM I tried to drive the VCO0 on PLL2 clock to 2500MHz with a 112.5MHz reference clock, but the 156.25 MHz clock after the divider turns out to be 170MHz and the 125MHz clock after the divider turns out to be 136MHz. What is going…