Part Number: PCM4202 Other Parts Discussed in Thread: PCM4204 Hi,
In order to input a single-ended signal to PCM4204 with minimum space/component requirements, despite high performance, is it possible to use a single OpAmp as specified in this design…
Part Number: PCM4204 Hi team,
I have a question coming from a customer.
For the PCM4204, do the analog inputs (VIN1, VIN2, VIN3, and VIN4) correspond or relate to the LRCK in I2S mode in anyway? If so, how?
Part Number: PCM4204 Hello,
I've been noticing a fair amount of low frequency noise coming from this chip, which is in the A/D section of a presonus audio interface I recently overhauled. In the image below, there's that spike that looks to be near-DC…
Part Number: PCM4204 We observe that the THD vs. frequency performance varies between channels while SNR stays the same. Is this expected, and if so, what influences the variations in THD performance?
Part Number: PCM4204 I have some questions about PCM40204:
1. how to set the SCKI and BCK frequency when the converter is in slave mode? For example, when Fs=32K, FBCK = 32 * 2 * Fs? and FSCKI can be set between 6.144MHz and 38.4MHz ? the clock of SCKI…
The better parts comparison is between the PCM4202 and PCM4204, where the latter is a four-channel version of the two-channel former. The PCM4222 is a different design, and notably it uses a +4.0 V analog rail rather than the +5.0 V rail of the 4202…
Part Number: PCM4204 The data sheet for the PCM4204 does not contain any thermal resistances. From a previous thread, I saw that the maximum junction temperature is 105°C.
Is there any data available for junction to case and/or junction to ambient…
Part Number: PCM4204 I am designing an acquisition system using the PCM4204. I will be running the 4204 in slave mode from a FPGA. The FPGA will input the SCKI clock and derive the BCK and LRCLK from that. I am going to use quad rate, left-justified PCM…
Other Parts Discussed in Thread: PCM4204 When using PCM4204 EVM development board TDM mode, the board is configured as S/M=1, FMT2=0, FMT1=1, FMT2=1; /EXT=1, OSC1=0, OSC2=0; then FS2=0 , FS1 = 0, FS2 = 1 (Dual Rate), the acquisition frequency is set to…
