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1/ Yes, I try all options but it only find other ICs on the bus, no UCD ACK
2/ because I copy the design from PMP9444 so using 1ohm to separate them.
Beside UCD eval board even use FB to connect V33A and V33D for fliting.
As now BPCAP voltage on GND…
Hello,
I reviewed the schematic and looks OK. I guess you changed the compensation network from PMP9444 based on output LC filter and load current. I do not see an issue here and that is good you have the 50 Ohms for loop measurement.
Regards
Part Number: TPS40428 Hi Ti team,
I have build a board with TPS40428 and 2x CSD95378B for evaluation, using 12V input to provide 1V output, design reference from PMP9444
but now my system have 2 issues
1/ OVF are easily triggered when enable TPS4042…
Dear Ed,
Thank you for feedback.
Finally I've found a product that matches perfectly our needs: Power Solution for Xilinx® Kintex® UltraScale™ ,
www.ti.com/tools/PMP9444
The only question: was this board tested over long cables (in our…
Hello. We do have some Power supply reference designs for Kintex Ultrascale FPGAs (PMP10630, PMP10555, PMP9463, PMP9444), however, I don't see one specifically for the XCKU15PFFVE1517 that you reference. I will check our with our Power Supply Design…
I have XML files for TI PMP9444 example design.
I use Fusion Digital Power Designer ver. 2.0.141.
When I open them with FDPD I always got error message (see attached picture).
How to solve the problem ?
