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  • RE: LVDS vs M-LVDS for clock distribution to multiple devices on multiple daughter boards

    James I would look at the DS92CK16 which is a 'BLVDS' clock buffer. BLVDS is a technology developed by National Semiconductor before the MLVDS standard was released, which is quite similar (B is for Bus, M is for Multipoint). The DS92CK16 is a 1:6…
    • Answered

  • CDCLVD1208 Power Supply Operation

    Resolved
    Other Parts Discussed in Thread: CDCLVD1204 , CDCUN1208LP , SN65LVDS108 TI Team, I'd like to know if I can run the CDCLVD1208RHDT beyond 2.8V? Actually, I have 3.3V available. I know the datasheet say that 2.8V is the absolute maximum, but it would…
    • Resolved

  • RE: DAC3171: DAC3171 driven by the same DA_CLK and DACCLK

    Dror, Did not see any timing issues. You could use the SN65LVDS101 to translate from LVDS to LVPECL. Regards, Jim scaa062.pdf

  • RE: DAC3162EVM: DAC3162 EVM output FPGA Clk (LVPECL) compatibility with Xilinx AC701 Board.

    Jayant, You may be able to modify the FPGA_CLK output on the DAC3162EVM with some resistors to get the output to the correct LVDS level for the Xilinx device. See Figure 4 of the attached document. Regards, Jim interfacing diff standards.pdf

  • DS90UB948-Q1: whether this solution is ok: 1*948→SN65LVDS109→4*947→4*948→4*Display

    TI Thinks Resolved
    Part Number: DS90UB948-Q1 Other Parts Discussed in Thread: SN65LVDS109 , SN65LVDS117 Hi Team, My customer used 948 and 947 before and today they would like to use 948 solution + repeater to make "1 to 4" Display expanding. The solution they want…

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