Krishnaveni,
To use the ZCU106 FMC you will have to first verify all of the required signals are routed on the ZCU106 FMC connector. You will need to us the following signals that are shown on sheet 7 of the attached schematic:
FMC_SDO
FMC_SEN_DAC…
Hi Kiran,
Thank you for sending the pdf. It helped me to better understand your setup.
If you wanted to use an external clock from the quick start tab in the choose clock mode click on the drop down and select external clock. Make sure that JP2 is…
8838.DAC3XJ8XEVM-SCH_D.pdf Rajk,
Remove the 100 termination resistors R60 and R65, and route SYSREF as DC coupled per the attached schematic. ADC looks fine.
Trace lengths are fine. Just make sure SYSREF and CLK are matched as close as possible to…
Weiyu,
For channel A, remove T1, T2, and R12. Install R14 and J4. Connect pin 3 to 4 and pin 1 to 6 using the pads of T1 with 0 Ohm resistors. Connect pin 1 to 6 and 3 to 4 using the pads of T2 with 0 Ohm resistors. Do the same for the other 3 channels…
Kiran,
The resistor divider network used on the TI EVM adjust the CM out of the LMK to match that of the DAC. See attached schematic.
Regards,
Jim
6560.DAC3XJ8XEVM-SCH_D.pdf
Imran,
I do not know much about this board. Did Xilinx route all of the required signals on this LPC connector? In the past, on one of their boards, they only routed 4 serdes lanes. Did you verify that SYSREF, 8 data lanes, device clock and SYNC are…
VT- max and VT+ min can over lap. The Hysteresis is still guarranteed. If the VT-max is on the upper end then the VT plus will be at least the VT- plus the hysteresis min.
The important values are VT-min and VT+ max. These are your Vil and Hih levels…
Loganathan,
1. Correct.
2. Correct
3. No. There is an option to sum path A with path C and path B with path D but this is only available with the DAC38J84, which has 4 DAC's. You cannot use this option with the DAC38J82.
You need an external modulator…
Pavan,
You can use AC or DC coupling. If you use DC coupling, the LMK should use LCPECL mode with a resistor pie network to get the common mode voltage to the correct level. See attached EVM schematic.
If you use AC coupling, depending on the pulse…
