Part Number: TLK6002 Tool/software: Hi,
I am transmitting data to TLK6002 board from my customized FPGA board and doing shallow loopback and sendback same data to FPGA borad, in FPGA board sometimes receive clock locking is not happening.
But TLK6002…
Part Number: TLK6002 Hi, I am transmitting data from TLK6002 channel A and receiving data from TLK6002 Channel B, Now Channel sync is not happening at channel B side. But When I send & receive from same channel(Channel A tx & rx, Channel B Tx & rx) then…
Part Number: TLK6002 In TLK6002, AGC lock is not happening, why AGCLOCK is not happening and what is the impact if AGCLOCK is not happened. Thanks & Regards, Mallikarjuna B.
Part Number: TLK6002
Hi,
I am transmitting data to TLK6002 from ZCU106 board, I am doing shallow local loopback and Rx data giving back to ZCU106 board.
Invalid receive clock is generating at TLK6002 and Channel sync is not happening but Channel…
Part Number: TLK6002 Other Parts Discussed in Thread: CDCM6208 Sir
We could able to read and write the TLK6002 Register using MDIO interface.
As per the MDIO Software user guide (SLLU195–November 2013) , there are some device initialization scripts…
Part Number: TLK6002 Other Parts Discussed in Thread: TPS65283 TLK6002 EVM
Sir
Is there any voltage sequencing requirement ( 1.8V and 1.0V supplies) for TLK6002 IC? We are planning to give these supplies from TPS65283 dual output buck converter without…
Part Number: TLK6002
Hi Team, seeking your assistance for this application.
TLK6002 for ARINC 818 Video Links.
Is there Hardware and Software Support Available?
It it possible to program the MDIO interface using SPI interface?
Thank you in…
Part Number: TLK6002 Other Parts Discussed in Thread: CDCM6208 Hi
I am trying to configure TLK6002 in Half-rate mode. I am following the below table to select reference clock and SERDES Multiplier.
I am configuring Serdes to work at 2.46 Gbps at HALF_RATE…