Part Number: TM4C1290NCZAD Other Parts Discussed in Thread: EK-TM4C1294XL Hi team
Regarding SSI of TM4C1290, how to clear the Tx FIFO? When using TM4C as a SPI slave, it would receive the data from the master and send the data back. The master would need…
Similary, is it not 0ns hold time when acting as slave reading data from a master ?
I seem to misinterpret the electrical timing table myself when I look at the data hold time on the slave. It looks like the 2 cycles is the hold time…
Part Number: TM4C1290NCZAD Guys,
If the TM4C1290 is running normally and the RST pin goes low and stays low, do the GPIO pins all get forced to HiZ immediately the falling edge on reset happens and, in this case, stay HiZ permanently?
Part Number: TM4C1290NCZAD Support,
I'm currently using the ADC on the TM4C1290N. Please will you help me out with the questions below.
Given the Table below extract from the datasheet:
Part Number: TM4C1290NCZAD Team,
I'm working from the app note SPMA073 using example 'ektm4c129_i2c_master_udma_fifo'. The demo is based on communicating with a 24C256 external memory device. The issue I have is I'm trying to communicate with a 24C02…
Part Number: TM4C1290NCZAD I am clocking my TM4C1290NCZAD at 120MHz.
My code is split into two sections: The low flash sector (0-16K) contains a boot-loader program. The remaining upper sectors contain my main application.
Using the TivaWare flash routines…
Part Number: TM4C1290NCZAD Tool/software: Code Composer Studio Hi,
with the TIVA ware we find a file (in NDK) called global.xdt with output to CCS console.
Like e.g. xdc_runtime_System_printf("Network Added: ");
Its seems, that this output makes…
Part Number: TM4C1290NCZAD Tool/software: Code Composer Studio The sampling frequency measurement is limited to 1 MHz
I want to raise the sampling frequency to 2 MHz
I tried the command
ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL…
Part Number: TM4C1290NCZAD Tool/software: TI C/C++ Compiler The SDRAM via EPI is working Properly using uDMA However I’m note able to get end of DMA interrupt.
I’m using similar code to Krishnan CIT_UDMA_EPI.zip
To enable interrupt I add
Part Number: TM4C1290NCZAD Hi,
We are useing TM4C1290 as I2C master.
The table26-48 in the datasheet describes that I2CSCL/I2CSDA fall time is max 10ns.
Should we meet the spec?
I think that is much faster than I2C standard.