Part Number: TMP126-Q1 Other Parts Discussed in Thread: TMP126 , TMP127 Tool/software: Hello, I am using tmp126 with ISO-SPI Communication.(LTC6820)
but i can't read device id.(0x2126)
//SPI-Master #include<SPI.h>
byte masterSend, masterRece…
Part Number: TMP126-Q1 Other Parts Discussed in Thread: TMP126 Tool/software: A follow-up question on the turn around between write and read to/from the TMP126.
The previous tread said that the turn around between write and read is on the first falling…
Part Number: TMP126 I am using stm32f2 series as master to access data from TMP126.
SPI configuration:
Full duplex master mode
mode: CPOL=0 CPAHASE=0 (mode 0)
data size=8bit
First bit= MSB
when i read single register first time after dumping or restarting…
Part Number: TMP126-Q1 Other Parts Discussed in Thread: TMP126
I have been trying to read from a PIC24 running SPI at 31Khz
Sending a 0x01, 0x0C, 0x00, 0x00 to get Device ID returns 0x21 0x26 as expected.
Sending 0x01, 0x00, 0xFF, 0xFF or any other…
Part Number: TMP126-Q1 Other Parts Discussed in Thread: TMP126 When exactly does the SIO pin change from input to output?
The data sheet only says "During a read command the TMP126-Q1 will control the SIO pin after the command word ."
It doesn…
Part Number: TMP126-Q1 I think there are two errors in the datasheet.
It says "An overview of a CRC enabled write transaction is shown below with a data block length of 2 " above Figure 8-15. I think it should say 4 instead of 2.
It says "An…
Part Number: TMP126 Other Parts Discussed in Thread: MSP430FR2355 , Hi,
I want to use the TMP126 with the MSP430FR2355.
I use the following code :
#include <msp430.h> unsigned int G_uint8compt = 1; unsigned int recu[3] = {0}; // ADC int main(void) { …
Part Number: TMP126 Per the datasheet for tmp126, the maximum supported SPI bus speed is 10 MHz. We have our HW configured as the figure below per the data sheet, where our VDD is 3.3V.
After doing some tests, we are able to receive data on the PICO…
Part Number: TMP126 Hello support team,
My customer ask SCLK logic treatment when /CS high. could you support? Fig 8.5.2 looks like to show SCLK low, while Fig 7.7 looks like to show high, this makes customer confused.
Thanks,
Koji Ikeda