Part Number: TMP75 Hi TI Support Team,
We are experiencing an I2C communication issue with the TMP75. Whenever the slave address is configured to 0x49 (A0=High, A1=Low, A2=Low), the communication fails.
To isolate the root cause, we have performed…
Part Number: TMP75 Other Parts Discussed in Thread: TMP1075 I have been trying to change the configured resolution from 12-bits to 9-bits. According to the datasheet the resolution of the shelf should already be 9-bits, but after trying to read from the…
Part Number: TMP75 Other Parts Discussed in Thread: TMP175 Hi Team
Could you please help to provide Output Current data for TMP75AIDGKR?
Thank you very much
Part Number: TMP75 Hello, The datasheet 7.3.2 states “The SDA and SCL pins feature integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise.”. What frequency response characteristics does this filter…
Part Number: TMP75 Tool/software: our QC has found there are 2 diff. marking for TMP75AIDGKR, one with TI logo, but our QC record are without TI logo marking on chips. and there is no PCN for marking change information, pls kindly help to check thanks…
Part Number: TMP75 Tool/software: Hello:
The customer is currently using TMP75AIDGKR material, and the maximum I2C data hold time requirement for TMP75 is 900ns（fast mode）. During testing, we found that the current hold time is 2622ns（normal mode is…
Part Number: TMP75 Tool/software: Hi expert,
When using TMP75 in standard mode I2C, customers tested that the SDA_rise time is 731.5ns/SCL_rise time is 771ns/SDA_hold time is 2.687us. All these 3 are beyond the range listed in timing requirements of…
