Part Number: TMS320C6678 Hi TI Team,
We want to know, how to use the default DSP interrupt vector number in the TMS320C6678 as an interrupt (for GPIO(pin)). And How many there are.
Please give us information for the same.
Warmest regards,
Krishn Singh…
Part Number: TMS320C6678 Hi E2E Support
TMS320C6678 access and boot from Intel FPGA(Arria V SoC) using SRIO.
I verified boot magic address(0x1087FFFC) stored desired entry address(0x0C000000) and available access entry address(0x0C000000) using CCS…
Part Number: TMS320C6678 Hi,
As per the snippet of code, we got the frequency but have some doubts about it.
1. Can we implement it into the all-core or individual core?
2. We used the code (as per the code's snippet) here is the image,
3. After the…
Part Number: TMS320C6678 By using the SPI module of TMS320C6678 to simultaneously control two SPI ICs (5-wire system), there is a significant delay of 492 ns between commands during continuous SPI instruction writing What is the reason for the excessive…
Hi Robert,
Robert Reed said: Are there any clear examples of how to implement the Advisory 9 workarounds? We're picking through old code here, second-guessing at what was intended, and an explicit guide to how things should be done that we can work off…
Part Number: TMS320C6678 Hi, Experts:
We want to use C6678's SRIO in mode 4(4x),
Our environment is CCS9.3.0.00012, pdk_c667x_2_0_16. We use the demo "SRIO_Loopback_evmc6678_C66BiosTestProject".
May I ask how to modify this demo to 4x mode…
Part Number: TMS320C6678 Other Parts Discussed in Thread: SYSBIOS The assigned high priority interrupt service program may not respond properly to high priority interrupts due to a low priority interrupt Task service program; The configuration is as follows…
Niklas Winter said: How do I know how the MSMC is configured? The MSMC manual mentions that it can be configured as level 2 or level 3 memory, however I haven't found any source clarifying how to configure the shared memory as level 2 or level 3 memor…