Part Number: TPS254900-Q1 Tool/software: Hi,
Please help me obtain the VIH, VIL, VOH, and VOL specifications for the USB I/Os DM_IN, DM_OUT, DP_IN, and DP_OUT, as these details are not available in the datasheet.
This is intended for I/O noise margin…
Part Number: TPS254900-Q1 Tool/software: Hi Ti:
I set TPS254900 to CDP in my PCB. When I use Electronic load equipment to test output current. The current is 0.5A . Why the current can not get 1.5A ? TPS25900 will auto set to SDP when equipment attach…
Part Number: TPS254900-Q1 Other Parts Discussed in Thread: TPS25830A-Q1 Hi, Support Team
We are currently evaluating the design changes the USB2.0 type A port to type C and supports BC1.2 CDP.
Please help to check the following questions for design…
Part Number: TPS254900-Q1 Hello all,
If a choke was to be added, would it be preferable to have it between the SOC and the TPS254900-Q1 or between the TPS254900-Q1 and the output port? Do we have any recommendations on choke values? Trying to optimize…
Part Number: TPS254900-Q1 Hi team,
My customer is using our TPS254900-Q1.
Could you please kindly help check below 3 questions?
1. Is the MOS between IN and OUT is NMOS?
2. When customer connected the OUT to other device like computer, will the…
Part Number: TPS254900-Q1 Hi team,
My customer is using our TPS254900-Q1, and they have two questions about the TVS choice.
1. Datasheet recommend "SMAJ16 for a 16-V battery or an SMAJ18 for an 18-V battery", but in their application, the battery…
Part Number: TPS254900A-Q1 Other Parts Discussed in Thread: TPS254900-Q1 Hi, Support Team
There are some questions for TPS254900-Q1 as below:
Since there is no down device for connect to TPS254900-Q1 5V output in out design.
Q1: Want to know how…
Part Number: TPS254900-Q1 Hi TI
The USB2.0 port of the customer's host device is connected to a Microchip single-port to four-port USB HUB chip (USB24915C https://www.semiee.com/file/Microchip/Microchip-MPLAB.pdf ), of which ports 1 and 3 are connected…
Part Number: TPS254900-Q1 We are entrusting USB authentication, TEST_ Attempting to change the relevant configuration of the chip in J mode, the experiment found that CTL1 and 2 were set to SDP mode, and the DM voltage was measured to be 4.7mV in J mode;…
