Part Number: TPS3431 We have a requirement of keeping WDO output logic low upon timeout. Since the output open drain and is pulled up so getting pulses with timeperiod of 1.6 sec. Please let us know if there is any way to keep the WDO output logic low…
Part Number: TPS3431 Hi,
Currently TPS3431SDRBR part is active, may I know how long it will be supported?
Is there any for EOL?
Can you suggest me few alternates for this part?
Part Number: TPS3431-Q1 Other Parts Discussed in Thread: TPS3431 , TPS3430-Q1 , Hi Team,
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The customer wants to find the watchdog with the same specifications as TPS3431 but conforms to the Automotive!
Should…
Part Number: TPS3431 Hi,
I have some questions would like to confirm with you.
1. Does the deice issue WD signal out (WDO_N) to MCU through GPIO pin?
2. Additionally, could you help explain ENOUT function ?
The spec shows that ENOUT could connect with…
Part Number: TPS3431-Q1 Hello team,
Per FAQ on Qualification available on TI e2e, The Q100 product is qualified based on the temperature grade. The stressing for Q100 product is pre and post tested at room and hot temperature per the grade pre and post…
Part Number: TPS3431 Hi.
I think WDO will be asserted for Trst after the timeout.
Does entering WDI during Trst return to normal operation?
Does entering WDI after Trst return to normal operation?
Regards.
Part Number: TPS3431-Q1 Hi team,
i would like to know,
when EN is pulled low, the watchdog timer is stopped or reset to 0?
when SET1 is pulled low, the watchdog timer is stopped or reset to 0?
when SET1 is pulled low, WDO will change to high impedance or…
Part Number: TPS3431 WDO is asserted (logic low) even after giving WDI pulses within timeout (1.6 sec) using GPIO pins of STM32.
It is also asserted while SET1 pin is forced low.
Please find attached schematic for my custom board and oscilloscope screenshot…