Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.
Part Number: TPS7H1111-SP Tool/software: We are currently using the TPS7H1111-SP PSpice model and running into significant issues with correlation of the phase margin and gain margin. We have tested with varying load currents and different combinations…
Part Number: TPS7H1111-SP Other Parts Discussed in Thread: TPS7H1111EVM-CVAL Hi,
Is there any output impedance data for the TPS7H1111-SP?
I've simulated the output impedance at 0A and 1.5A using 2x100uF output caps and also simulated with a 1nF cap.…
Part Number: TPS7H1111-SP Hi,
I'm comparing the bode plots from the datasheet to the PSpice simulation included in the model.
I can't seem to match the plots well. What am I doing wrong?
Here is the circuit and some of the overlays.
Part Number: TPS7H1111-SP Other Parts Discussed in Thread: PSPICE-FOR-TI Hi experts
Are there unencrypted PSpice models available for this device?
Thanks,
Jim B
Part Number: TPS7H1111-SP Hello Team, I have been reading the document LDO Basics (slyy151a) from TI. The document refers to the capacitor DC voltage derating. In the image, the locked dipole seems to align with the applied electric field. While the active…
Part Number: TPS7H1111-SP Hi experts
Can someone comment on how to use OUTS for remote sensing when paralleling 2 devices to support higher load current needs?
Thanks,
Jim B
Hi David,
We have 3 LDOs that would meet all your requirements with the exception of total IOUT, so we would need to parallel them to provide the full load. We do have design guidance on parallel LDO configurations in the datasheets, as well as…