Part Number: UCD3138 Tool/software: Hi TI experts,
I need for code conversion from UCD3138064 to UCD3138128. May I ask if there are any relevant documents that I can refer to?
Thanks!
Part Number: UCD3138128
Regarding the event update window (EUW), As default the EUW is located at the begging of each switching period and lasts time. If it is the UCD3138128 and UCD3138128A version, how many ns is it?
Part Number: UCD3138128 About SPEC VIH > 2.1V is High-level and VIL < 1.1V is Low-level , Why test result : VIH > 1.6V is High-level and VIL < 1.6V is Low-level,no voltage window?
Part Number: UCD3138128 Our customer has a problem with a high defect rate when programming TI UCD3138128PFC (TQFP80) to use our off-line programmer. So we need your help to provide relevant suggestive programming circuit schematic for the reference.…
Part Number: UCD3138128 Other Parts Discussed in Thread: UCD3138 Our customer has a problem with a high defect rate when programming TI UCD3138128PFC (TQFP80) to use our off-line programmer. So we need your help to provide relevant suggestive programming…
Part Number: UCD3138128 Other Parts Discussed in Thread: UCD3138 Hi team,
For UCD3138 RAMP_COMP_INT_STATUS register, will this register be clear automaticlly once we read this register?
And how long will it take from the read to clear?
Thanks
Best reg…
Part Number: UCD3138128 About the RSVD pin from the datasheet it should be connect to BP18 through 1K.
Any side effects if RSVD will be connected to GND?
Part Number: UCD3138128 Other Parts Discussed in Thread: UCD3138 Hi Champ,
I am asking for my customer.
They are trying to use the I3C module to communicate with the device (UCD3138128) on their PSU, and there is a communication issue on it.
For UCD series…
Part Number: UCD3138128 I want to make a time difference between SDA and SCL in ACK stage. What can I do to make SDA pull low early in the I2C clock stretching phase as shown below?
Or SDA pull low longer. What do I do to achieve my goal?
Part Number: UCD3138128 When DPWM was in resonant mode, Phase-trigger register was not taken effect. For example,during DPWM0 and DPWM1 resonant mode, if Dpwm1Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; the phase between DPWM1 and DPWM2 was random and no sync…