Hello,
Please use the schematic review and layout tips for verifying your schematic, as Ethan mentioned our responses may be delayed due to holidays.
https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1051774…
Hi Ajith,
In the layout I see several issues which can have an impact on disturbances in the regulation loop, e.g.
- Kelvin connection to sense resistor attached to CS/CSG - large loop and CSG directly connected to PGND
- Large loop area for HDRV1…
Hi Daniel,
That circuit is a linear regulator that is used to take out the dependance on the output voltage for the loop compensation. It basically gets rid of the inner loop. Please see attached app note that covers this.
It makes the compensation…
Hi Kerim,
yes, i also think the layout needs to improvement and that the issue most properly is due to noise pickup into CSA/CSB lines. This are very sensitive and most responsible input for the control loop. Therefore there are dedicated pins to have…
Hi Conner,
all can have here an impact.
This overshoot or undershoots are mainly driver by parasitic on the boards and components. Most important is here to have a good layout - see the previous recommended app note but also here you can find a lot…
Hi Kelly,
thank you for your extensive testing. 10nF is really quite high and i would not have expected that this high cap would be required.
On the other hand this also gives a hint that the inductance on the gate lines for the high side MOSFET …
Hi Kotaro,
It is not recommended to use higher Cboot other than suggested value in datasheet.
Rather I would suggest using snubber circuit for that. Power Tips: Calculate an R-C snubber in seven steps
Regards
Arpita
HI Romuald.
Note: don not use thermals on all components in the power stage. This adds additional parasitic inductance which could have negative impact on the power stage and the performance.
(In below list items which should be checked again have…
Hi Satoru,
if I got it rigth, you are sharing the same trace for SW and CSA. So all the noise due to the current in SW1 (return path for high side Buck MOSFET gate signal) is injected into the current measurement signal.
This can disturb the whole…
Hello,
Please see my comments to your questions below.
1)Because the UCC28750 series has different features such as OTP (Over Temperature Protection), OVP (Over Voltage Protection), OCP (Over Current Protection), and SCP (Short Circuit Protection…
