Hi Bernhard,
I just wanted to chime in a bit here while others on the team are out for holiday.
Bernhard Boehmer said: Else, please give an example explicitly listing hypothetical values of HD2, HD3, HD4, HD5, HD6, HD7, ... which could show how SFDR could…
Hi Sefa,
On the EVM schematic there is no 1.5V IC for the ADC common mode or the amplifier common mode because in that configuration the VCM for the ADC is generated internally and then the VCM pin of the ADC is outputting 1.5V that is then used as the…
Hi Drew,
we are indeed using ADS54J60EVM on the FMC connector of a Xilinx ZCU102 FPGA.
The input signal is the output of an RF generator plus a mixer to simulate AWGN.
The above spectra are the result of the FFT accumulation over 1sec, the FFT size is…
Hello,
xi lin said: I am trying to fill in the ADC input impedance equivalency diagram above for the ADS1015. Can you please advise what is C_S (min and max and typ) and C_p1 and C_p2?
The ADS1015-Q1 is a delta-sigma ADC so generally it will appear resistive…
Part Number: ADS131M04
Hello
We are using the ADS131M04 to measure mains voltage (rms magnitude, phase and harmonic components via FFT). We want to make sure there are 256 samples per cycle (coherent sampling to minimise measurement inaccuracy). This…
Hi Amrithapriya,
Welcome to our e2e forum! You can use the SAR ADC Drive calculator tool found in the Analog Engineers Calculator as a substitute, that tool is here: https://www.ti.com/tool/ANALOG-ENGINEER-CALC
Our TINA-TI or P-Spice for TI really only…
Hi Danilo,
Here is performance of ADC at 1G sampling and 100MHz input with single ended input.
As you can see the SFDR and Harmonics related performance is degraded because of using the ADC with single ended input.
Regards,
Neeraj
Hi Nam,
Nam, Dino said: Do you know what filters the customer has configured from the AD8421 output to the VF4 output? passive component value can be ignored.
As shown on the schematic above, the INA849 has an input low-pass filter with a corner frequency…
Part Number: AFE5809 Hi Team,
I’m using 12MHz sampling clock with the AFE5809, so I choose the 5MHz LPF before ADC. The input signal scans 1MHz ~ 6MHz, but I cannot see obvious suppression above 5MHz. What’s wrong?
The commands set for AFE5809…
HI
I am a student
i downloaded the adc harmonic calculator from www.ti.com/.../adc-harmonic-calc
I wish to know the formula/reference to calculate the "min freq" and "max freq" for each harmonics HD2, HD3, HD4, etc...