Part Number: ADC12DJ2700 The ADC12DJ2700 will be used to configure the system using undersampling technique.
I am trying to use the DDC module in ADC12DJ2700, and while reading the datasheet regarding the NCO frequency setting, I had a question in the…
Hi Paul
Here is a simplified circuit sketch for the ADC12DJ2700 JESD204B serial data outputs:
Approximate values for the resistors are Rs = 90 Ohm and Rp = 110 Ohm.
Best regards,
Jim B
Hey Heidi,
It's hard to judge without a scope shot to see the swing you are getting. can you send me one? Otherwise try anywhere from 140-220 ohm.
Thanks
Yusuf
Part Number: ADC12DJ2700 Hello Team,
The ADC has several calibration modes. One important calibration procedure seems to be the offset calibration. The internal occurring DC-offsets (in dual channel mode) should be eliminated with this calibration procedure…
Part Number: ADC12DJ2700 Other Parts Discussed in Thread: ADC12DJ3200 Hi to all,
sorry to come back with a similar issue to the mentioned thread.
At the moment we'd like to check, if it is possible to use the Offset-Calibration of the ADC12DJ3200…
Part Number: ADC12DJ3200 Other Parts Discussed in Thread: ADC12DJ2700 , Is the performance of this when clocked for sampling at 5.4GSPS the same as ADC12DJ2700?
Ie. are the essentially the same silicon but the ADC12DJ2700 only rated for lower sample…
Part Number: ADC12DJ2700 hello,
I have a LVDS output from a Xilinx Ultrascale and would like to connect it to the TMSTP inputs, and use it as JESD204B SYNC.
I understand that when TMSTP is used as JESD204B SYNC, it requires an active low signaling…
Part Number: ADC12DJ2700 Other Parts Discussed in Thread: , LM95233 In note 1 on page 4 of the ADC12DJ2700 datasheet, it says that:
"Powering down the high-speed data outputs (DA0± ... DA7±, DB0± ... DB7±) for extended times may reduce performance of…
Part Number: ADC12DJ2700 Other Parts Discussed in Thread: CDCLVP1102 Customer has a design that requires the use of the TMSTP input to the ADC12DJ2700. The datasheet (page 4) mentions that this input must be externally biased (unlike the CLK /- and SYSREF…