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  • ADC12DL3200: Noise Spectral Density vs Sampling clock

    Resolved
    Part Number: ADC12DL3200 Other Parts Discussed in Thread: ADC32RF54 , ADC12DJ3200 Hi team, i am analyzing the Noise Spectral Density values of the ADC12DL3200. With default full-scale range it is about -150 dBFS/Hz. This value is obtained with no…
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    • Answered

  • ADC12DL3200: Package pin delays

    Resolved
    Part Number: ADC12DL3200 HI, Is it possible to get the pin package delays (or skew) so we can compensate for that when routing our PCB.
    • Resolved

  • RE: ADC12DL3200: adc12dl3200: clock management and delay adjust function

    Hi David, usually I've alligned the data bus using the test pattern. I'm not sure that the value obtained is stable with the real data but this is the only way that I've to acquire the data. I've another question: - Could you suggest me the ADC…

  • ADC12DL3200: reference design for Xilinx ( source code availability )

    TI Thinks Resolved
    Part Number: ADC12DL3200 Other Parts Discussed in Thread: TSW14DL3200EVM I've seen the reference design source code in the forum ati this box link from jim s: https://txn.box.com/s/x8j30r6kabzup8auywqkk71kjh5djttd Is the reference design for ADC12DL3200…
    • Answered

  • ADC12DL3200: Minimum Height Dimension

    Resolved
    Part Number: ADC12DL3200 Hello Team, My customer is looking for the Minimum Height Dimension for the ADC12DL3200ALJ. It seems that the datasheet only shows the ACF package and no ALJ package drawing. This is the same with DAC12DL3200ALJ, no ALJ…
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    • Answered

  • ADC12DL3200: How to interface a biased signal to ADC12DL3200 using DC couple

    Resolved
    Part Number: ADC12DL3200 Hi, there : The signal we are interested is a signal with bias voltage (0.9V), but the input common-mode voltage of ADC12DL3200 is 0V. The signal BW ranges from DC to several hundred MHz, so we can only use DC couple interface…
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    • Answered

  • ADC12DL3200: ADc12DL3200 reference design for Xilinx ( source code availability )

    Resolved
    Part Number: ADC12DL3200 I've seen the reference design source code in the forum. Is the reference design for ADC12DL3200 reference design code xilinx available in another location? Box doesn't allow me to access the file. Thank you, Zeki
    • Resolved
    • Answered

  • ADC12DL3200EVM: ADC12DL3200: How to read ADC Register in ADC12DL3200EVM Board through SPI interface.

    Resolved
    Part Number: ADC12DL3200EVM Other Parts Discussed in Thread: ADC12DL3200 , , DAC12DL3200 Hi, I want to read ADC12DL3200 Register ADC12DL3200EVM in Python 3 environment But ADC12DLxx00EVM GUI is base on Python 2 ver. So I want to control direct…
    • Resolved

  • ADC12DL3200: Alignment of samples on the 4 LVDS buses

    TI Thinks Resolved
    Part Number: ADC12DL3200 I have a design using a single ADC12DL3200 device and capturing the ADC data inside an FPGA using the 4 LVDS buses from the ADC chip. I don't have the SYSREF signal connected to the ADC chip, and I'm finding that the ADC samples…

  • ADC12DL3200: ADC12DL3200 SYSREF required?

    TI Thinks Resolved
    Part Number: ADC12DL3200 I'm planning to use one ADC12DL3200 in single channel mode with 4 LVDS buses with a sample rate fs of 5000 MHz. Do I need to use SYSREF? It appears that SYSREF is only used for synchronizing two or more ADC12DL3200's.

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