Hi Jim
Ok we tried the register setting change but no difference.
Yes those voltages, 0.6V and 1.2V are measured at the pins of the ADC. Since we disconnected this input from the on-board LMK, there is nothing else that could affect these pins.…
Hi
The ADC12J2700 device has excellent performance with inputs from DC to 3 GHz.
If you DC couple a differential amplifier output (or other differential signal) to the EVM inputs you will get good performance. The only constraint is that the common…
Hi User
The Automation Function APIs and Automation DLL are also capable of communicating with the ADC12J2700EVM GUI to allow Write/Read access to ADC registers or control fields identified in the ADC12J2700 GUI Low Level View tab.
Best regards, …
Hi Dan
My apologies for the delayed response to this question.
The ADC12J4000 (and slower ADC12J1600 and ADC12J2700) have a minimum allowed clock speed of 1 GHz. This is the lowest frequency that it is tested at in production. Usage at lower clock…
Hi Sergio,
You can use LMH3401 or LMH5401 amplifier to help reduce the insertion loss but the amplifiers will add significant harmonic distortion and won't help much with slope roll off.
If wide bandwidth and low insertion loss and better performance…
Hi Katsunaga-san
The complex output data of the LM15851 is always output in signed 2's complement format.
The selection of offset binary or signed 2's complement is only available in the ADC12J4000, ADC12J2700 and ADC12J1600, when those devices are…
Hi Henry
To do what you want using the ADC12D1600RFRB (reference board), you need to apply an external clock frequency of 1.3 GHz and configure the ADC into DES-I (dual edge sampling mode, I-channel input). One minor component change is required to…
Hi Vic
Those pins on the LM15851 are somewhat confusing. The reason for this is that the LM15851 is a related product to the ADC12J4000, ADC12J2700 and ADC12J1600. The ADC12Jxxxx products have one additional operating mode which utilizes 8 differential…
Ross,
The ‘jesd_top_qsys’ module has all the “ JESD interface ” related instantiations like xcvr Rx and Tx native PHYs, JESD Rx and Tx IPs, Reconfiguration & Reset controllers and transport layer. Please find the details of modules present under ‘jesd_top_qsys…