Part Number: ADC12J4000EVM Other Parts Discussed in Thread: TSW12J54EVM , , LMH5401 , ADC12J4000 , TSW14J57EVM Hi Jim
My input signal is from 10MHz to 400MHz, if this board work in 1GSPS mode, will my low frequency component pass into the system? And is there…
Part Number: ADC12J4000EVM Hi,
I want totake a temperature test for my device.And the ADC12J4000EVM also shuould be taken into the thermostat.So I want to know the highest temperature it can withstand.
Thanks!
Part Number: TSW14J56EVM Hi,
I would like to capture waveforms measured by the ADC12J4000EVM (LiDAR application) directly through C/C++ or MATLAB - it there a possibility to transfer the data directly instead of saving to a .csv or binary file and reading…
Part Number: ADC12J4000EVM Other Parts Discussed in Thread: ADC12J4000 Dear Jim / Team,
I have a customer who purchased two EVMs of the ADC12J4000EVM.
He has worked with them in the past however wasn't able to connect to them lately using the new GUI…
Part Number: ADC12J4000EVM Hi,
The datasheet states (on page 44, section 7.3.7.2.11) that the timestamp is sample at "approximately" the same time as the signal. What does "approximately" mean? Is the timing between sampling the signal and the timestamp…
Part Number: ADC12J4000EVM Hello. I would like to connect the ADC12J4000EVM to Terasic Altera Transceiver Signal Integrity Development Kit, Stratix V GX Edition with SMA cable. Are there any board, connector or other device that I have to purchase to…
Hello Shai
I apologize that no-one has responded to address your question before now. Are you still trying to resolve the information seen in Signal Tap?
I do not have the FPGA inspection tools available, but I know that after the JESD204B completes the…
Hi Dmitri
The Ramp pattern is at the octet level. The octet values continually increase in each lane until they reach FF and then roll to 00 and continue ramping.
As shown in the datasheet and in the firmware example the actual ADC data is mapped from…
Part Number: ADC12J4000EVM Other Parts Discussed in Thread: ADC12J4000 Hello,
Our original FPGA(Xilinx KU060) board is combined ADC12J4000EVM via FMC.
I'm checking the received data from ADC12J4000(JESD204B) using ChipScope on FPGA.
It seems the Ramp_Test_Data…
Part Number: ADC12J4000EVM Other Parts Discussed in Thread: ADC12J4000 , ADC12DJ3200 I have a question about the sample mapping for the ADC12J4000EVM.
I have organized the samples from the JESD204B interface according to Table 12 and Table 13 in the datasheet…