Part Number: ADC32RF80 Hi
In the datasheet for ADC32RF80 all calculations and graphs was made for Fs = 2949.12M. But description on your site say Fs_max = 3000M, so Fs can be 3000M. On the other hand, the built-in NCO has resolution 16 bits, (2^16 = 65366…
Part Number: ADC32RF80 Other Parts Discussed in Thread: LMK04828 , Hello! I have custom board with two ADC32RF80 + LMK04828 + FPGA. I run ADC on Fs = 2400 Mhz, Single-Band Complex Output, Decimation = 32, LMFS = 2441. Both ADCs and FPGA clocked from one…
Part Number: ADC32RF80 DEARS.
Customer is ADC32RF80 is designed and used.
Fs = 2949.12Mhz
Interleaving spur occurs at 2580.48MHz.
The frequency band you are using.
In this case, is it appropriate to use the command "Steps for freezing the corrector block…
Part Number: ADC32RF80 Other Parts Discussed in Thread: TSW40RF80EVM , Hi
I used TSW40RF80EVM with ADC32RF80 for the digitization of the pulses filled with sinuses 1005 M. Then ADC DDC mixed them with 1000M, decimated by 4 and filtered. TSW40rf80evm is…
Part Number: ADC32RF80 We have a question about Offset corrector block in adc32rf80. Harmonics of which level we should expect at frequencies which is multiple of 1/8 of sample rate in case of this block is disabled (not freezed) with "DIS OFFSET CORR…
Part Number: ADC32RF80 Other Parts Discussed in Thread: ADC32RF45EVM , LMX2582 , ADC32RF45 Tool/software: Code Composer Studio Hi TI
We want to develop ADC32RF80, but there are too many registers.
Is there any reference code that can help us?
Can it be…
Part Number: ADC32RF80 Good day,
I have a design on an FPGA that includes two JEDS204B data receivers. The first receives data from channel A of the ADC32RF80 while the second receives data from channel B. When I configure the DDCs of channel A to Divide…
Part Number: ADC32RF80 Hello all! I have board with FPGA + ADC32rf80 + LMK. I can receive synchronous ADC samples from channels A & B. I want to receive synchronous test patterns from both channels. Datasheet says: "The test patterns can be synchronized…
Part Number: ADC32RF80 Dears.
We are using Nyquist zone (0 ~ Fs / 2) for 3G sampling.
In this case, there is a phenomenon that the signal is rejected when inputting 750MHz CW.
We will ask you to confirm whether there is an input restriction for Fs / 4…
Part Number: ADC32RF80 Dears.
The customer board was designed in ADC32RF80. The setting values are as follows.
L: 4 M : 4 F : 2 C : 1 K : 32 Scramble : Off Sampling : 3Ghz Serdesclk : 250M Jesdcore clk : 125M sysref : 7.8125M
The data output from the ADC32RF80…