Part Number: ADS54J42EVM Other Parts Discussed in Thread: ADS54J40 , ADS54J42 Figure 2 is Quick Start Test Setup diagram in ADS54J42EVM User's Guide.
If SW14J56EVM is not connected, could ADS54J40_LMF_8224.cfg be configured into ADS54J42?
In another…
Part Number: ADS54J42EVM Other Parts Discussed in Thread: ADS54J42 , ADS54J40 , TSW14J57EVM
Hi TI Experts,
I've been trying to interface the ADS54J42 EVM with the Intel Arria 10 FPGA Development Board. I have them connected via FMC. Thus far, I've been…
Part Number: ADS54J42EVM Other Parts Discussed in Thread: ADS54J60EVM , ADS54J40 Dears.
We are considering developing the ADS54J42 .
We have ADS54J60EVM.
Please help me with the CFG file that can run JESD204B 4Line in ADS54JxxEVM.
We set it as follows.
*…
Part Number: ADS54J42EVM Other Parts Discussed in Thread: ADS54J40EVM As per title, I'm looking for the schematics and Layout for the ADS54J42EVM.
The data-sheet refers to the product page, but only the software is provided.
Thank you for the assistance…
Other Parts Discussed in Thread: ADS54J42EVM , ADS54J42 , ADS58J63 Hello
I'm Alber as a FAE in Arrow Korea.
They have tested the mode as default in UserGuide(LMFS=8224) on evaluation board(ADS54J42EVM + TSW14J56)
My customer want to use ADS54J42 as setting…
Thank you, Jim. I think the TSW14J57 meets our requirements best, interfaced with ADS54J42EVM. But I am still not sure if I will be able to trigger the TSW with both ADC and DAC modules at the same time. Could you suggest a DAC module that could be interfaced…
ADS54J42_LMF_4211_Fs_460.8M_K32.cfg Henry,
I used the attached config file to run the ADS54J42EVM using the setup values per your request. This had the serdes rate 4.608G and the FPGA reference clock required was 115.2Msps.
Regards,
Jim
DEAR.JIM
Loading a CFG file from ADS54J42EVM will not PLL lock it.
Should I use the ADS54J40_2x_4222 file in HSDC-Pro?
The test results are as follows.
Our LMFS is 2242.
Can you support HSDC ADS54J40_2x_2242 files?
The difference between the SNR and…
Louis,
Are they testing with a TI ADS54J42EVM or a custom board? What sample rate are they using? What frequency is SYSREF? What FPGA are they using? What are the issues?
Regards,
Jim