Part Number: PCA9555 The PCA9555PWR has the following address pins;
A0 = HIGH
A1 = LOW
A2 = LOW
The first write access results in a NACK. We have tried all address options from the microcontroller and it still gives a NACK.
The start and address…
Part Number: PCA9555 Dear TI member,
We know the INT pin is cleared by BIOS read IO expander.
We want to confirm that if the interrupt occurs after entering the OS, how can the IO expander INT pin be cleared?
Thanks.
Ariel
Part Number: PCA9555 Hi,
Customer reported I2C SDA/SCL undershoot found with PCA9555. Please see customer description below and help to comment.
Need your support to clarify the observation in using TI PCA9555APW.
We found the I2C clock sent…
Part Number: PCA9555 Other Parts Discussed in Thread: TCA9555 Dear Sirs,
While power on, the PCA9555 will have abnormal pull low pulse on SDA to cause I2C device error.
The same design for TCA9555 is no problem.
Please help on it!
Below are the…
Part Number: PCA9555 Other Parts Discussed in Thread: SN74LVC1G57 , SN74LVC1G123 HI sir,
We now have a CPU connect the reset pin on PCA9555 P16, but when we enable the reset function (set the P16 to Low) the CPU cannot perform actions.
The reset…
Part Number: PCA9555 Dear Team,
Could you help to let me know what is the difference between 9555 and 9535?
I didn't see obvious difference between these two parts from the spec.
Thank you.
Regards,
Jim
Part Number: PCA9555 Hi Team,
Can this device work with both input and output signal flow? Such as P0~P7 as input IO, P8~P15 as output IO. Is there any notices with the timing sequence of read and write? Thanks.
BRs,
Francis
Part Number: PCA9555 Other Parts Discussed in Thread: TCA9555 Dear TI members,
Due to the design of the PCA9555, we have some questions.
We are wondering if it is necessary to clear INT after reading GPIO high/low?
If necessary, Any suggestions…
