Thank you for your reply.
As is shown in the picture below, I think:at the t1 moment (instant) , the inductor current drops to 0 and the energy stored in inductor has been released completely. After t1, the capacitor discharges and charges the inductor…
Hello Oleg,
In you use case, which event of the following events is used for generating rising edge of PWM?
CTR=zero, CTR=PRD, CTR=CMPA, CTR=CMPB, T1, T2, SW force
EPWM SOCA/SOCB events can be generated using DCAEVT1.soc, CTR=zero, CTR=PRD, CTRU/D=CMPA…
Hi,
Siddharth Deshpande said: The "--cmd_file="syscfg/device_cmd.opt" option has to be specified to the compiler so that it define the CMDTOOL symbo
Thanks, it looks like it works (for the symbol define, at least).
Here is the console…
Hi Suhas,
1. The Orientation of Diode FET (T2, T6, T4, T8) is wrong. Reveres the FET Drain and Source connections, i.e. connect Source of the FET to the input. The correct FET connections are as shown below.
2. If the internal disconnect switch between…
Hello Desheng,
You are right, the current of t2 to t3 is caused by resonant between decoupling cap on daughter board and L on Monther board. After removing all caps in daughter board. The current went to 0 after VDS raising to 125V. Does the resonant…
Other Parts Discussed in Thread: T2-SW Hi
can anyone help me on that? what is really supporting 2 CAPACITANCE CALCULATOR - T2-SW? this is mentionned on different POL tools .. but link seems to be broken.
http://focus.ti.com/docs/toolsw/folders/print…
Garry, what did you try from the doc above exactly?
Are you using C2000 SysConfig GUI contiguration tool?
Other solutions are using the SW ACTIONS. or setting the T1/T2 to be EPWMXSYNCI, they set an action for them. I can expand on this. But before that…
Hi,
The hardware priorities in C2000 devices are fixed and nesting is disabled by default. Interrupt nesting and customizing priorities is achieved through software.
Once the C28x core branches to an ISR code, the global interrupt is disabled by hardware…
heiio harry-san,
The simulation model used is a pspice model. Compatible with psice model FET from the manufacturer.
As shown in the attached document, I performed a simulation using the circuit at the bottom of the SIM sheet, but excessive overshoot occurred…