Part Number: MSP432E401Y I'm currently designing a microcontroller board with MSP432E401Y which uses EPI Host bus muxed mode for interfacing with 3 devices(SRAM, Parallel Flash and FPGA)
To segregate the address and data line, should i add a D-latch…
Other Parts Discussed in Thread: TIDM-TM4CFLASHSRAM Hi Team, Our customer would like to request for the design files of the TIDM-TM4CFLASHSRAM reference design. The files are apparently one of the key factors on the processor selection for their new project…
Hi Lezhong,
I hope based on the feedback from the other posts you were able to continue with the SDRAM example. I will close this one here.
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based…
There is the reference design TIDM-TM4CFLASHSRAM which shows how to interface to a Parallel NOR flash device. While the reference design is for a TM4C129 device, the TM4C129 and MSP432E are sibling devices with the same peripherals so you should be able…
Part Number: TM4C1294KCPDT Other Parts Discussed in Thread: TIDM-TM4CFLASHSRAM Hi.
Is there a recommendation from TI to use the EPI in the mode "Host-Bus 8/16 Mode Asynchronous Muxed Read/Write"´? For this mode an address latch is needed…