Part Number: TLV2553 On the current version of the datasheet Figure 35 shows a maximum delay time (td2) on 10ns between the falling edge of the last I/O clock and the falling edge of EOC. However, Table 6.9 shows td2 as the delay time between the CS rising…
Part Number: TLV2553 I got a quite wired problem with TLV2553, please view attached picture.
When the Chip Select (Pin 15) goes from LOW to HIGH at the end of transaction, there is a very slow edge on DATA OUT (Pin 16).
I do have external pull up resistors…
Part Number: TLV2553 The width of the EOC signal (Tconvert) is dominated and determined by the internal clock frequency according to the equation Tconvert = (13.5 x (1/Fosc) + 25ns)
The data sheet specifies the minimum clock frequency (maximum EOC width…
Part Number: TLV2553 Hi Team –
Posting on customer behalf.
Please confirm that the typical total adjusted error of 15bits is a misprint in the specification because it exceeds the other error sources on the data sheet by a factor of 2.5. Believe…
Part Number: TLV2553 Hi,
I see this converter has the test modes shown below, can these be used to show if the VREF is still connected and in spec?
1011b Bh SELECT TEST, Voltage = (VREF+ + VREF–)/2
1100b Ch SELECT TEST, Voltage = REFM
1101b Dh SELECT…
Part Number: TLV2556 Other Parts Discussed in Thread: TLV2553 Hello,
Is there an IBIS model available for TLV2556? I could not find one on the product page.
Other Parts Discussed in Thread: TLV2553 , LM3S6537 Hi,
I have to use manual control of CS? I would use hardware SPI.
I use this functions:
void initVstupyADC(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0); GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE,EN…
After reading the datasheet again, I don't think the TLV2556 will work. I can probably get CFGR2 configured in the bootloader and then the main app wouldn't touch it, but the problem turns out to be CFGR1. Looks like every single conversion needs to specify…